On x86, some peripherals on pci buses need to be accessed in the early phase (eg: pci uart) with a valid pci memory/io address, thus scan the pci bus and do the corresponding resource allocation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
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cpu | ||
dts | ||
include/asm | ||
lib | ||
config.mk | ||
Kconfig | ||
Makefile |