5f184715ec
Extends the mii_dev structure to participate in a full-blown MDIO and PHY driver scheme. The mii_dev structure and miiphy calls are modified in such a way to allow the original mii command and miiphy infrastructure to work as before, but also to support a new set of APIs which allow (among other things) sharing of PHY driver code and 10G support The mii command will continue to support normal PHY management functions (Clause 22 of 802.3), but will not be changed to support 10G (Clause 45). The basic design is similar to PHY Lib from Linux, but simplified for U-Boot's network and driver infrastructure. We now have MDIO drivers and PHY drivers An MDIO driver provides: read write reset A PHY driver provides: (optionally): probe config - initial setup, starting of auto-negotiation startup - waiting for AN, and reading link state shutdown - any cleanup needed The ethernet drivers interact with the PHY Lib using these functions: phy_connect() phy_config() phy_startup() phy_shutdown() Each PHY driver can be configured separately, or all at once using config_phylib_all_drivers.h (added in the patch which adds the drivers) We also provide generic drivers for Clause 22 (10/100/1000), and Clause 45 (10G) PHYs. We also implement phy_reset(), and call it in phy_connect(). Because phy_reset() is essentially the same as miiphy_reset, but: a) must support 10G PHYs, and b) should use the phylib primitives, we implement miiphy_reset, using phy_reset(), but only when CONFIG_PHYLIB is set. Otherwise, we just use the old version. In this way, we save on compile size, even if we don't manage to save code size. Pulled ethtool.h and mdio.h from: git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6 782d640afd15af7a1faf01cfe566ca4ac511319d With many, many deletions so as to enable compilation under u-boot Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
144 lines
4.7 KiB
C
144 lines
4.7 KiB
C
/*----------------------------------------------------------------------------+
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| This source code is dual-licensed. You may use it under the terms of the
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| GNU General Public License version 2, or under the license below.
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| This source code has been made available to you by IBM on an AS-IS
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| basis. Anyone receiving this source is licensed under IBM
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| copyrights to use it in any way he or she deems fit, including
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| copying it, modifying it, compiling it, and redistributing it either
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| with or without modifications. No license under IBM patents or
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| patent applications is to be implied by the copyright license.
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| Any user of this software should understand that IBM cannot provide
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| technical support for this software and will not be responsible for
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| any consequences resulting from the use of this software.
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| Any person who transfers this source code or any derivative work
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| must include the IBM copyright notice, this paragraph, and the
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| preceding two paragraphs in the transferred software.
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| COPYRIGHT I B M CORPORATION 1999
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| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
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| Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
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+----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------+
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| File Name: miiphy.h
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| Function: Include file defining PHY registers.
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| Author: Mark Wisner
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+----------------------------------------------------------------------------*/
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#ifndef _miiphy_h_
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#define _miiphy_h_
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#include <common.h>
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#include <linux/mii.h>
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#include <linux/list.h>
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#include <net.h>
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#include <phy.h>
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struct legacy_mii_dev {
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int (*read)(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value);
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int (*write)(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value);
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};
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int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short *value);
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int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short value);
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int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
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unsigned char *model, unsigned char *rev);
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int miiphy_reset(const char *devname, unsigned char addr);
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int miiphy_speed(const char *devname, unsigned char addr);
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int miiphy_duplex(const char *devname, unsigned char addr);
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int miiphy_is_1000base_x(const char *devname, unsigned char addr);
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#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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int miiphy_link(const char *devname, unsigned char addr);
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#endif
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void miiphy_init(void);
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void miiphy_register(const char *devname,
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int (*read)(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value),
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int (*write)(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value));
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int miiphy_set_current_dev(const char *devname);
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const char *miiphy_get_current_dev(void);
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struct mii_dev *mdio_get_current_dev(void);
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struct mii_dev *miiphy_get_dev_by_name(const char *devname);
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struct phy_device *mdio_phydev_for_ethname(const char *devname);
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void miiphy_listdev(void);
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struct mii_dev *mdio_alloc(void);
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int mdio_register(struct mii_dev *bus);
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void mdio_list_devices(void);
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#ifdef CONFIG_BITBANGMII
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#define BB_MII_DEVNAME "bb_miiphy"
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struct bb_miiphy_bus {
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char name[NAMESIZE];
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int (*init)(struct bb_miiphy_bus *bus);
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int (*mdio_active)(struct bb_miiphy_bus *bus);
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int (*mdio_tristate)(struct bb_miiphy_bus *bus);
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int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
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int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
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int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
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int (*delay)(struct bb_miiphy_bus *bus);
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#ifdef CONFIG_BITBANGMII_MULTI
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void *priv;
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#endif
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};
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extern struct bb_miiphy_bus bb_miiphy_buses[];
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extern int bb_miiphy_buses_num;
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void bb_miiphy_init(void);
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int bb_miiphy_read(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value);
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int bb_miiphy_write(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value);
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#endif
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/* phy seed setup */
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#define AUTO 99
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#define _1000BASET 1000
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#define _100BASET 100
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#define _10BASET 10
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#define HALF 22
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#define FULL 44
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/* phy register offsets */
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#define MII_MIPSCR 0x11
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/* MII_LPA */
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#define PHY_ANLPAR_PSB_802_3 0x0001
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#define PHY_ANLPAR_PSB_802_9 0x0002
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/* MII_CTRL1000 masks */
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#define PHY_1000BTCR_1000FD 0x0200
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#define PHY_1000BTCR_1000HD 0x0100
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/* MII_STAT1000 masks */
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#define PHY_1000BTSR_MSCF 0x8000
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#define PHY_1000BTSR_MSCR 0x4000
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#define PHY_1000BTSR_LRS 0x2000
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#define PHY_1000BTSR_RRS 0x1000
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#define PHY_1000BTSR_1000FD 0x0800
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#define PHY_1000BTSR_1000HD 0x0400
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/* phy EXSR */
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#define ESTATUS_1000XF 0x8000
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#define ESTATUS_1000XH 0x4000
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#endif
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