35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
81 lines
1.5 KiB
C
81 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Actions Semi Owl SoCs platform support.
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*
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* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*/
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#include <cpu_func.h>
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#include <init.h>
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#include <asm/cache.h>
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#include <asm/global_data.h>
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#include <linux/arm-smccc.h>
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#include <linux/psci.h>
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#include <common.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/psci.h>
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#define DMM_INTERLEAVE_PER_CH_CFG 0xe0290028
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DECLARE_GLOBAL_DATA_PTR;
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unsigned int owl_get_ddrcap(void)
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{
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unsigned int val, cap;
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/* ddr capacity register initialized by ddr driver
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* in early bootloader
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*/
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#if defined(CONFIG_MACH_S700)
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val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0x7;
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cap = (val + 1) * 256;
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#elif defined(CONFIG_MACH_S900)
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val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0xf;
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cap = 64 * (1 << val);
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#endif
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return cap;
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}
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/*
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* dram_init - sets uboots idea of sdram size
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*/
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int dram_init(void)
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{
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gd->ram_size = owl_get_ddrcap() * 1024 * 1024;
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return 0;
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}
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/* This is called after dram_init() so use get_ram_size result */
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = gd->ram_size;
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return 0;
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}
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static void show_psci_version(void)
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{
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struct arm_smccc_res res;
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arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
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printf("PSCI: v%ld.%ld\n",
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PSCI_VERSION_MAJOR(res.a0),
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PSCI_VERSION_MINOR(res.a0));
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}
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int board_init(void)
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{
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show_psci_version();
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return 0;
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}
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void reset_cpu(void)
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{
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psci_system_reset();
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}
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