986922714f
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Peter Pearse <peter.pearse@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com>
235 lines
7.0 KiB
C
235 lines
7.0 KiB
C
/*
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* (C) Copyright 2003
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* Texas Instruments.
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* Kshitij Gupta <kshitij@ti.com>
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* Configuation settings for the TI OMAP Innovator board.
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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* Configuration for Versatile PB.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
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#define CONFIG_VERSATILE 1 /* in Versatile Platform Board */
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#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */
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#ifndef CONFIG_ARCH_VERSATILE_AB /* AB */
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#define CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
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#endif
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#define CONFIG_SYS_MEMTEST_START 0x100000
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#define CONFIG_SYS_MEMTEST_END 0x10000000
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#define CONFIG_SYS_HZ (1000000 / 256)
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#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
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#define CONFIG_SYS_TIMER_INTERVAL 10000
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#define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4)
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#define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */
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/*
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* control registers
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*/
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#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
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/*
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* System controller bit assignment
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*/
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#define VERSATILE_REFCLK 0
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#define VERSATILE_TIMCLK 1
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#define VERSATILE_TIMER1_EnSel 15
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#define VERSATILE_TIMER2_EnSel 17
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#define VERSATILE_TIMER3_EnSel 19
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#define VERSATILE_TIMER4_EnSel 21
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_MISC_INIT_R 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
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/* size in bytes reserved for initial data */
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#define CONFIG_SYS_GBL_DATA_SIZE 128
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/*
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* Hardware drivers
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*/
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#define CONFIG_DRIVER_SMC91111
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#define CONFIG_SMC_USE_32_BIT
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#define CONFIG_SMC91111_BASE 0x10010000
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#undef CONFIG_SMC91111_EXT_PHY
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK 24000000
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#define CONFIG_PL01x_PORTS \
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{(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1 }
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 38400
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_SYS_SERIAL0 0x101F1000
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#define CONFIG_SYS_SERIAL1 0x101F2000
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_BDI
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_IMI
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVEENV
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTDELAY 2
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#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\
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"netdev=25,0,0xf1010000,0xf1010010,eth0"
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/*
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* Static configuration when assigning fixed address
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*/
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#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Monitor Command Prompt */
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#ifdef CONFIG_ARCH_VERSATILE_AB
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# define CONFIG_SYS_PROMPT "VersatileAB # "
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#else
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# define CONFIG_SYS_PROMPT "VersatilePB # "
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#endif
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
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#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/*
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* Use the CFI flash driver for ease of use
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*/
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_ENV_IS_IN_FLASH 1
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/*
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* System control register
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*/
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#define VERSATILE_SYS_BASE 0x10000000
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#define VERSATILE_SYS_FLASH_OFFSET 0x4C
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#define VERSATILE_FLASHCTRL \
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(VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
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/* Enable writing to flash */
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#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0)
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
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/*
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* Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block
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* i.e.
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* the bottom "sector" (bottom boot), or top "sector"
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* (top boot), is a seperate erase region divided into
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* 4 (equal) smaller sectors. This, notionally, allows
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* quicker erase/rewrire of the most frequently changed
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* area......
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* CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4
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*/
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#ifdef CONFIG_ARCH_VERSATILE_AB
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#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */
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#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE)
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#define CONFIG_SYS_MAX_FLASH_SECT (520)
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#endif
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#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
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#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
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#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE
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#define CONFIG_SYS_MAX_FLASH_SECT (260)
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#endif
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#define CONFIG_SYS_FLASH_BASE 0x34000000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE)
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/* The ARM Boot Monitor is shipped in the lowest sector of flash */
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#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
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#define CONFIG_ENV_SIZE 8192
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#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
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#endif /* __CONFIG_H */
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