65cc0e2a65
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
61 lines
1.5 KiB
C
61 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* ti_omap3_common.h
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* For more details, please see the technical documents listed at
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* http://www.ti.com/product/omap3530
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* http://www.ti.com/product/omap3630
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* http://www.ti.com/product/dm3730
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*/
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#ifndef __CONFIG_TI_OMAP3_COMMON_H__
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#define __CONFIG_TI_OMAP3_COMMON_H__
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/*
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* High Level Configuration Options
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*/
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap.h>
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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/* NS16550 Configuration */
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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#define CFG_SYS_NS16550_CLK V_NS16550_CLK
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#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
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115200}
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/* Select serial console configuration */
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#ifdef CONFIG_SPL_BUILD
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#define CFG_SYS_NS16550_COM1 OMAP34XX_UART1
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#define CFG_SYS_NS16550_COM2 OMAP34XX_UART2
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#define CFG_SYS_NS16550_COM3 OMAP34XX_UART3
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#endif
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/* Physical Memory Map */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CFG_SYS_TIMERBASE (OMAP34XX_GPT2)
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/* SPL */
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#ifdef CONFIG_MTD_RAW_NAND
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#define CFG_SYS_NAND_BASE 0x30000000
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#endif
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/* Now bring in the rest of the common code. */
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#include <configs/ti_armv7_omap.h>
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#endif /* __CONFIG_TI_OMAP3_COMMON_H__ */
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