f138713073
GPIO, I2C, LCD and HDMI are now implemented. We have more than one PMIC. There is an implementation to run the CPU at full speed although it does not seem to make much difference. Update the README to cover recent developments. Signed-off-by: Simon Glass <sjg@chromium.org>
261 lines
8.2 KiB
Plaintext
261 lines
8.2 KiB
Plaintext
#
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# Copyright (C) 2015 Google. Inc
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# Written by Simon Glass <sjg@chromium.org>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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U-Boot on Rockchip
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==================
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There are several repositories available with versions of U-Boot that support
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many Rockchip devices [1] [2].
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The current mainline support is experimental only and is not useful for
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anything. It should provide a base on which to build.
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So far only support for the RK3288 and RK3036 is provided.
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Prerequisites
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=============
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You will need:
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- Firefly RK3288 board or something else with a supported RockChip SoC
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- Power connection to 5V using the supplied micro-USB power cable
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- Separate USB serial cable attached to your computer and the Firefly
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(connect to the micro-USB connector below the logo)
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- rkflashtool [3]
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- openssl (sudo apt-get install openssl)
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- Serial UART connection [4]
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- Suitable ARM cross compiler, e.g.:
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sudo apt-get install gcc-4.7-arm-linux-gnueabi
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Building
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========
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At present three RK3288 boards are supported:
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- Firefly RK3288 - use firefly-rk3288 configuration
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- Radxa Rock 2 - use rock2 configuration
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- Hisense Chromebook - use chromebook_jerry configuration
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Two RK3036 board are supported:
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- EVB RK3036 - use evb-rk3036 configuration
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- Kylin - use kylin_rk3036 configuration
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For example:
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CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
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(or you can use another cross compiler if you prefer)
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Writing to the board with USB
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=============================
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For USB to work you must get your board into ROM boot mode, either by erasing
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your MMC or (perhaps) holding the recovery button when you boot the board.
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To erase your MMC, you can boot into Linux and type (as root)
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dd if=/dev/zero of=/dev/mmcblk0 bs=1M
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Connect your board's OTG port to your computer.
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To create a suitable image and write it to the board:
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./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
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./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
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cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
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If all goes well you should something like:
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U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
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Card did not respond to voltage select!
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spl: mmc init failed with error: -17
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### ERROR ### Please RESET the board ###
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You will need to reset the board before each time you try. Yes, that's all
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it does so far. If support for the Rockchip USB protocol or DFU were added
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in SPL then we could in principle load U-Boot and boot to a prompt from USB
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as several other platforms do. However it does not seem to be possible to
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use the existing boot ROM code from SPL.
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Booting from an SD card
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=======================
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To write an image that boots from an SD card (assumed to be /dev/sdc):
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./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
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firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
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sudo dd if=out of=/dev/sdc seek=64 && \
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sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
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This puts the Rockchip header and SPL image first and then places the U-Boot
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image at block 256 (i.e. 128KB from the start of the SD card). This
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corresponds with this setting in U-Boot:
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
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Put this SD (or micro-SD) card into your board and reset it. You should see
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something like:
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U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
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Model: Radxa Rock 2 Square
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DRAM: 2 GiB
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MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
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*** Warning - bad CRC, using default environment
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In: serial
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Out: vop@ff940000.vidconsole
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Err: serial
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Net: Net Initialization Skipped
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No ethernet found.
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Hit any key to stop autoboot: 0
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=>
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If you have an HDMI cable attached you should see a video console.
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For evb_rk3036 board:
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./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
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cat evb-rk3036/u-boot-dtb.bin >> out && \
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sudo dd if=out of=/dev/sdc seek=64
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Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
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debug uart must be disabled
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Booting from SPI
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================
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To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
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./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
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-d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
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dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
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cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
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dd if=out.bin of=out.bin.pad bs=4M conv=sync
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This converts the SPL image to the required SPI format by adding the Rockchip
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header and skipping every 2KB block. Then the U-Boot image is written at
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offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
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The position of U-Boot is controlled with this setting in U-Boot:
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#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
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If you have a Dediprog em100pro connected then you can write the image with:
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sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
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When booting you should see something like:
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U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
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U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
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Model: Google Jerry
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DRAM: 2 GiB
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MMC:
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Using default environment
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In: serial@ff690000
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Out: serial@ff690000
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Err: serial@ff690000
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=>
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Future work
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===========
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Immediate priorities are:
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- USB host
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- USB device
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- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
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- Ethernet
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- NAND flash
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- Support for other Rockchip parts
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- Boot U-Boot proper over USB OTG (at present only SPL works)
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Development Notes
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=================
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There are plenty of patches in the links below to help with this work.
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[1] https://github.com/rkchrome/uboot.git
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[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
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[3] https://github.com/linux-rockchip/rkflashtool.git
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[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
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rkimage
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-------
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rkimage.c produces an SPL image suitable for sending directly to the boot ROM
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over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
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followed by u-boot-spl-dtb.bin.
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The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
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starts at 0xff700000 and extends to 0xff718000 where we put the stack.
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rksd
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----
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rksd.c produces an image consisting of 32KB of empty space, a header and
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u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
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most of the fields are unused by U-Boot. We just need to specify the
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signature, a flag and the block offset and size of the SPL image.
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The header occupies a single block but we pad it out to 4 blocks. The header
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is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
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image can be encoded too but we don't do that.
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The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
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or 0x40 blocks. This is a severe and annoying limitation. There may be a way
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around this limitation, since there is plenty of SRAM, but at present the
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board refuses to boot if this limit is exceeded.
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The image produced is padded up to a block boundary (512 bytes). It should be
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written to the start of an SD card using dd.
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Since this image is set to load U-Boot from the SD card at block offset,
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
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u-boot-dtb.img to the SD card at that offset. See above for instructions.
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rkspi
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-----
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rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
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resulting image is then spread out so that only the first 2KB of each 4KB
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sector is used. The header is the same as with rksd and the maximum size is
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also 32KB (before spreading). The image should be written to the start of
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SPI flash.
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See above for instructions on how to write a SPI image.
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rkmux.py
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--------
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You can use this script to create #defines for SoC register access. See the
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script for usage.
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Device tree and driver model
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----------------------------
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Where possible driver model is used to provide a structure to the
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functionality. Device tree is used for configuration. However these have an
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overhead and in SPL with a 32KB size limit some shortcuts have been taken.
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In general all Rockchip drivers should use these features, with SPL-specific
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modifications where required.
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--
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Simon Glass <sjg@chromium.org>
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24 June 2015
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