c2ae7d8220
Move the SPL settings into common/spl where most of the SPL code is kept. Signed-off-by: Simon Glass <sjg@chromium.org>
25 lines
772 B
Plaintext
25 lines
772 B
Plaintext
CONFIG_ARM=y
|
|
CONFIG_ARCH_SUNXI=y
|
|
CONFIG_MACH_SUN8I_A23=y
|
|
CONFIG_DRAM_CLK=432
|
|
CONFIG_DRAM_ZQ=63351
|
|
CONFIG_MMC0_CD_PIN="PB4"
|
|
CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
|
|
CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
|
|
CONFIG_USB0_ID_DET="PH8"
|
|
CONFIG_AXP_GPIO=y
|
|
CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:36,ri:210,up:18,lo:22,hs:10,vs:5,sync:3,vmode:0"
|
|
CONFIG_VIDEO_LCD_DCLK_PHASE=0
|
|
CONFIG_VIDEO_LCD_POWER="PH7"
|
|
CONFIG_VIDEO_LCD_BL_EN="PH6"
|
|
CONFIG_VIDEO_LCD_BL_PWM="PH0"
|
|
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04"
|
|
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
|
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
|
|
CONFIG_SPL=y
|
|
# CONFIG_CMD_IMLS is not set
|
|
# CONFIG_CMD_FLASH is not set
|
|
# CONFIG_CMD_FPGA is not set
|
|
CONFIG_AXP_DLDO1_VOLT=3300
|
|
CONFIG_USB_MUSB_HOST=y
|