e9e5d9d29f
To fully support DM timer in SPL and TPL, we need a few things cleaned up and normalised: - inclusion of the uclass and drivers should be an all-or-nothing decision for each stage and under control of $(SPL_TPL_)TIMER instead of having the two-level configuration with TIMER and $(SPL_TPL_)TIMER_SUPPORT - when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can not be compiled in This normalises configuration to $(SPL_TPL_)TIMER and moves the config options to drivers/timer/Kconfig (and cleans up the collateral damage to some defconfigs that had SPL_TIMER_SUPPORT enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
78 lines
1.8 KiB
Plaintext
78 lines
1.8 KiB
Plaintext
CONFIG_X86=y
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_X86_RUN_64BIT=y
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CONFIG_VENDOR_GOOGLE=y
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CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
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CONFIG_TARGET_CHROMEBOOK_LINK64=y
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CONFIG_DEBUG_UART=y
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CONFIG_HAVE_MRC=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_FIT=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_CPU_SUPPORT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_NET_SUPPORT=y
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CONFIG_SPL_PCI_SUPPORT=y
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CONFIG_SPL_PCH_SUPPORT=y
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CONFIG_SPL_RTC_SUPPORT=y
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CONFIG_SPL_TIMER=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_PCI=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_PING=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_BOOTSTAGE=y
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CONFIG_CMD_TPM=y
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CONFIG_CMD_TPM_TEST=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_SPL_DM=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_CPU=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_INTEL=y
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CONFIG_CROS_EC=y
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CONFIG_CROS_EC_LPC=y
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CONFIG_DEBUG_UART_BASE=0x3f8
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CONFIG_DEBUG_UART_CLOCK=1843200
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CONFIG_DEBUG_UART_BOARD_INIT=y
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CONFIG_SYS_NS16550=y
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CONFIG_TPM_TIS_LPC=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_KEYBOARD=y
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CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
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CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
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CONFIG_VIDEO_IVYBRIDGE_IGD=y
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CONFIG_CONSOLE_SCROLL_LINES=5
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_TPM=y
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