1eaeb58e3c
Add support for TI OMAP5912 OSK Board * Patch by Sam Song May, 07 May 2004: Fix typo of UPM table for rmu board
139 lines
5.7 KiB
C
139 lines
5.7 KiB
C
/*
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*
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* BRIEF MODULE DESCRIPTION
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* TI H2 and P2 Debug Board hardware map
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*
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* Copyright (C) 2004 MPC-Data Limited. (http://www.mpc-data.co.uk)
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* Author: MPC-Data Limited
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* Dave Peverley
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __INCLUDED_H2_P2_DBH_BOARD_H
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#define __INCLUDED_H2_P2_DBH_BOARD_H
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#include <asm/arch/sizes.h>
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/*
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* The Debug board is designed to function with the P2 Sample, H2
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* Sample and 1610 Innovator boards. The main difference AFAICT is
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* the chip selects used with each system ;
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*
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* P2 Sample : CS1 of OMAP730 is used to select the CPLD & LAN regs
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* H2 Sample : CS1a is used to select the CPLD registers.
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*
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*/
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/***************************************************************************
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* CPLD Registers
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**************************************************************************/
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#define H2DBG_CPLD_REVISION 0x04000010
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#define H2DBG_BOARD_REVISION 0x04000012
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#define H2DBG_GPIO_REGISTER 0x04000014
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#define H2DBG_LED_CONTROL 0x04000016
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#define H2DBG_MISC_INPUT 0x04000018
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#define H2DBG_LAN_STATUS 0x0400001A
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#define H2DBG_LAN_RESET 0x0400001C
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#define H2DBG_ETH_REG_BASE 0x04000300
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/***************************************************************************
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* Ethernet Control Registers
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* These are for the LAN91C96 on the debug board
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**************************************************************************/
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/* Bank 0 in IO space */
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#define ETH_TCR (H2DBG_ETH_REG_BASE + 0x00) /* Transmit Control Register */
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#define ETH_EPH_STATUS (H2DBG_ETH_REG_BASE + 0x02) /* EPH Status Register */
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#define ETH_RCR (H2DBG_ETH_REG_BASE + 0x04) /* Receive Control Register */
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#define ETH_COUNTER (H2DBG_ETH_REG_BASE + 0x06) /* Counter Register */
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#define ETH_MIR (H2DBG_ETH_REG_BASE + 0x08) /* Memory Information Register */
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#define ETH_MCR (H2DBG_ETH_REG_BASE + 0x0A) /* Memory Configuration Register */
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/* Bank 1 in IO space */
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#define ETH_CONFIG (H2DBG_ETH_REG_BASE + 0x00) /* Configuration Register */
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#define ETH_BASE (H2DBG_ETH_REG_BASE + 0x02) /* Base Address Register */
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#define ETH_IA0 (H2DBG_ETH_REG_BASE + 0x04) /* Individual Address Register - 0 */
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#define ETH_IA1 (H2DBG_ETH_REG_BASE + 0x05) /* Individual Address Register - 1 */
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#define ETH_IA2 (H2DBG_ETH_REG_BASE + 0x06) /* Individual Address Register - 2 */
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#define ETH_IA3 (H2DBG_ETH_REG_BASE + 0x07) /* Individual Address Register - 3 */
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#define ETH_IA4 (H2DBG_ETH_REG_BASE + 0x08) /* Individual Address Register - 4 */
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#define ETH_IA5 (H2DBG_ETH_REG_BASE + 0x09) /* Individual Address Register - 5 */
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#define ETH_GEN_PURPOSE (H2DBG_ETH_REG_BASE + 0x0A) /* General Address Registers */
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#define ETH_CONTROL (H2DBG_ETH_REG_BASE + 0x0B) /* Control Register */
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/* Bank 2 in IO space */
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#define ETH_MMU (H2DBG_ETH_REG_BASE + 0x00) /* MMU Command Register */
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#define ETH_AUTO_TX_START (H2DBG_ETH_REG_BASE + 0x01) /* Auto Tx Start Register */
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#define ETH_PNR (H2DBG_ETH_REG_BASE + 0x02) /* Packet Number Register */
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#define ETH_ARR (H2DBG_ETH_REG_BASE + 0x03) /* Allocation Result Register */
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#define ETH_FIFO (H2DBG_ETH_REG_BASE + 0x04) /* FIFO Ports Register */
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#define ETH_POINTER (H2DBG_ETH_REG_BASE + 0x06) /* Pointer Register */
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#define ETH_DATA_HIGH (H2DBG_ETH_REG_BASE + 0x08) /* Data High Register */
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#define ETH_DATA_LOW (H2DBG_ETH_REG_BASE + 0x0A) /* Data Low Register */
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#define ETH_INT_STATS (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Status Register - RO */
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#define ETH_INT_ACK (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Acknowledge Register -WO */
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#define ETH_INT_MASK (H2DBG_ETH_REG_BASE + 0x0D) /* Interrupt Mask Register */
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#ifndef __ASSEMBLY__
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/*
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* A couple of utility inlines to aid debugging using the LED's on the
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* debug board.
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*/
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static inline void set_led_state(int state)
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{
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static unsigned long hw_led_state = 0;
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volatile unsigned short *led_address = 0x04000016;
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hw_led_state = ((unsigned long)state);
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*((unsigned short *) (led_address)) = (unsigned short) (~hw_led_state & 0xFFFF);
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}
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static inline void spin_up_leds()
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{
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volatile int i, j, k;
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for (k = 0; k < 2; k++) {
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for (i = 0; i < 16; i++) {
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for (j = 0; j < 5000; j++) {
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set_led_state(1 << i);
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}
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}
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for (i = 15; i >= 0; i--) {
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for (j = 0; j < 5000; j++) {
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set_led_state(1 << i);
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}
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}
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}
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}
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#endif /* ! __ASSEMBLY__ */
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#endif /* ! __INCLUDED_H2_P2_DBH_BOARD_H */
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