u-boot/drivers/clk
Tom Rini e2b86e23ce - stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
 - stm32mp1: several board and arch updates
 - stm32mp1: activate data cache in SPL and before relocation
 - Many improvment for AV96 board and DHCOR SoM
   (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
    Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
 - clk: stm32mp1: fix CK_MPU calculation
 - DT alignment of stm32mp1 device tree with Linux 5.7-rc2
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Merge tag 'u-boot-stm32-20200514' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
- stm32mp1: several board and arch updates
- stm32mp1: activate data cache in SPL and before relocation
- Many improvment for AV96 board and DHCOR SoM
  (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
   Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
- clk: stm32mp1: fix CK_MPU calculation
- DT alignment of stm32mp1 device tree with Linux 5.7-rc2
2020-05-14 08:44:06 -04:00
..
altera dm: core: remove the duplicated function dm_ofnode_pre_reloc 2020-04-16 08:07:58 -06:00
analogbits clk: sifive: Sync-up WRPLL library with upstream Linux 2019-07-19 14:24:51 +08:00
aspeed dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
at91 dm: core: remove the duplicated function dm_ofnode_pre_reloc 2020-04-16 08:07:58 -06:00
exynos clk: Remove DM_FLAG_PRE_RELOC flag in various drivers 2018-11-14 09:16:28 -08:00
imx clk: imx: clk-imxrt1050: fix lcdif clock gate 2020-05-01 19:03:25 +02:00
intel x86: remove dead code in intel_clk_get_rate() 2020-03-05 18:19:40 +08:00
mediatek clk: mediatek: use unsigned type for returning the clk rate 2020-01-26 12:03:06 +01:00
meson clk: meson: g12a: add missing SD_EMMC_A controller gates 2020-04-28 10:23:10 +02:00
mtmips clk: add clock driver for MediaTek MT76x8 platform 2019-10-25 17:20:44 +02:00
mvebu clk: armada-37xx-periph: fix DDR PHY clock divider values 2020-04-22 14:28:15 +02:00
owl clk: actions: Add common clock driver 2020-04-24 16:40:09 -04:00
renesas clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2 2020-03-30 03:49:23 +02:00
rockchip clk: rk3399: Set empty for HCLK_SD assigned-clocks 2020-05-01 18:32:56 +08:00
sifive dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
sunxi sunxi: clocks: Add H6 USB clock gates and resets 2019-07-16 17:13:15 +05:30
tegra dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
uniphier dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_bcm6345.c clk: bcm6345: convert to use live dt 2018-06-01 15:56:02 +02:00
clk_boston.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_fixed_factor.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk_fixed_rate.c clk: fixed_rate: add dummy enable() function 2020-01-16 09:39:45 -05:00
clk_pic32.c common: Move get_tbclk() to time.h 2020-01-17 13:27:30 -05:00
clk_sandbox_ccf.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_sandbox_test.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_sandbox.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_stm32f.c clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock 2018-05-08 09:07:34 -04:00
clk_stm32h7.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_stm32mp1.c clk: stm32mp1: fix CK_MPU calculation 2020-05-14 09:02:12 +02:00
clk_versal.c clk: versal: Fix watchdog clock issue 2020-04-27 13:57:17 +02:00
clk_vexpress_osc.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_zynq.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_zynqmp.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk-cdce9xx.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk-composite.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-divider.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-fixed-factor.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-gate.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-hsdk-cgu.c CLK: ARC: HSDK: add separate clock map for HSDK-4xD 2020-05-13 18:09:27 +03:00
clk-mux.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-ti-sci.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk-uclass.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk.c clk: show more error info when uclass_get_device_by_name 2020-01-26 12:03:06 +01:00
ics8n3qv01.c clk: Add ICS8N3QV01 driver 2018-05-08 18:50:23 -04:00
Kconfig CLK: ARC: HSDK: add separate clock map for HSDK-4xD 2020-05-13 18:09:27 +03:00
Makefile x86: Add a clock driver for Intel devices 2020-02-07 22:41:24 +08:00
mpc83xx_clk.c common: Move clock functions into a new file 2020-01-17 13:27:29 -05:00
mpc83xx_clk.h clk: Add MPC83xx clock driver 2018-09-18 00:01:18 -06:00