u-boot/configs/socfpga_is1_defconfig
Simon Goldschmidt e263607a03 arm: socfpga: disable CONFIG_SPL_WDT for gen5 and a10
These boards don't have a watchdog enabled in SPL, so make sure
CONFIG_SPL_WDT is not enabled.

Fixes: commit 6874cb7220 ("watchdog: Split WDT from SPL_WDT")

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-10-06 15:20:53 -04:00

55 lines
1.4 KiB
Plaintext

CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_TARGET_SOCFPGA_IS1=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0"
CONFIG_CMD_UBI=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_DEVICE=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
# CONFIG_SPL_WDT is not set