u-boot/include/versalpl.h
Oleksandr Suvorov d7fcbfc19b fpga: xilinx: add bitstream flags to driver desc
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 09:34:21 +02:00

18 lines
341 B
C

/* SPDX-License-Identifier: GPL-2.0 */
/*
* (C) Copyright 2019 Xilinx, Inc,
* Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
*/
#ifndef _VERSALPL_H_
#define _VERSALPL_H_
#include <xilinx.h>
#define VERSAL_PM_LOAD_PDI 0x701
#define VERSAL_PM_PDI_TYPE 0xF
extern struct xilinx_fpga_op versal_op;
#endif /* _VERSALPL_H_ */