0fd3d91152
Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
150 lines
3.2 KiB
C
150 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <serial.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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/* status register */
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#define ALTERA_UART_TMT BIT(5) /* tx empty */
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#define ALTERA_UART_TRDY BIT(6) /* tx ready */
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#define ALTERA_UART_RRDY BIT(7) /* rx ready */
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struct altera_uart_regs {
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u32 rxdata; /* Rx data reg */
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u32 txdata; /* Tx data reg */
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u32 status; /* Status reg */
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u32 control; /* Control reg */
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u32 divisor; /* Baud rate divisor reg */
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u32 endofpacket; /* End-of-packet reg */
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};
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struct altera_uart_plat {
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struct altera_uart_regs *regs;
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unsigned int uartclk;
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};
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static int altera_uart_setbrg(struct udevice *dev, int baudrate)
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{
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struct altera_uart_plat *plat = dev_get_plat(dev);
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struct altera_uart_regs *const regs = plat->regs;
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u32 div;
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div = (plat->uartclk / baudrate) - 1;
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writel(div, ®s->divisor);
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return 0;
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}
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static int altera_uart_putc(struct udevice *dev, const char ch)
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{
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struct altera_uart_plat *plat = dev_get_plat(dev);
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struct altera_uart_regs *const regs = plat->regs;
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if (!(readl(®s->status) & ALTERA_UART_TRDY))
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return -EAGAIN;
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writel(ch, ®s->txdata);
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return 0;
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}
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static int altera_uart_pending(struct udevice *dev, bool input)
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{
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struct altera_uart_plat *plat = dev_get_plat(dev);
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struct altera_uart_regs *const regs = plat->regs;
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u32 st = readl(®s->status);
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if (input)
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return st & ALTERA_UART_RRDY ? 1 : 0;
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else
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return !(st & ALTERA_UART_TMT);
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}
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static int altera_uart_getc(struct udevice *dev)
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{
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struct altera_uart_plat *plat = dev_get_plat(dev);
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struct altera_uart_regs *const regs = plat->regs;
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if (!(readl(®s->status) & ALTERA_UART_RRDY))
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return -EAGAIN;
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return readl(®s->rxdata) & 0xff;
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}
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static int altera_uart_probe(struct udevice *dev)
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{
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return 0;
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}
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static int altera_uart_of_to_plat(struct udevice *dev)
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{
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struct altera_uart_plat *plat = dev_get_plat(dev);
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plat->regs = map_physmem(dev_read_addr(dev),
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sizeof(struct altera_uart_regs),
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MAP_NOCACHE);
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plat->uartclk = dev_read_u32_default(dev, "clock-frequency", 0);
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return 0;
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}
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static const struct dm_serial_ops altera_uart_ops = {
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.putc = altera_uart_putc,
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.pending = altera_uart_pending,
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.getc = altera_uart_getc,
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.setbrg = altera_uart_setbrg,
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};
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static const struct udevice_id altera_uart_ids[] = {
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{ .compatible = "altr,uart-1.0" },
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{}
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};
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U_BOOT_DRIVER(altera_uart) = {
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.name = "altera_uart",
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.id = UCLASS_SERIAL,
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.of_match = altera_uart_ids,
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.of_to_plat = altera_uart_of_to_plat,
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.plat_auto = sizeof(struct altera_uart_plat),
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.probe = altera_uart_probe,
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.ops = &altera_uart_ops,
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};
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#ifdef CONFIG_DEBUG_UART_ALTERA_UART
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
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u32 div;
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div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
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writel(div, ®s->divisor);
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}
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static inline void _debug_uart_putc(int ch)
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{
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struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
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while (1) {
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u32 st = readl(®s->status);
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if (st & ALTERA_UART_TRDY)
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break;
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}
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writel(ch, ®s->txdata);
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}
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DEBUG_UART_FUNCS
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#endif
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