u-boot/arch/microblaze
Ovidiu Panait d1114b8340 microblaze: exception: fix unaligned data access register mask
The correct mask for getting the source/destination register from ESR in
the case of an unaligned access exception is 0x3E0. With this change, a
dummy unaligned store produces the expected info:
"""
>> swi r5, r0, 0x111

 ...
 Hardware exception at 0x111 address
 Unaligned data access exception
 Unaligned word access
 Unaligned store access
 Register R5
 Return address from exception 0x7f99dfc
 ### ERROR ### Please RESET the board ###
"""

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-6-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
..
cpu microblaze: exception: fix unaligned data access register mask 2022-02-15 13:11:43 +01:00
dts .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
include/asm Pull request doc-2022-04-rc1 2022-01-20 09:39:45 -05:00
lib image: Drop IMAGE_ENABLE_OF_LIBFDT 2021-10-08 15:53:26 -04:00
config.mk microblaze: Enable GCC garbage collector for full U-Boot 2020-11-20 10:42:53 +01:00
Kconfig microblaze: Kconfig: SPL dependencies fixup 2022-01-05 10:22:03 +01:00
Makefile SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00