9c653aad16
Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
111 lines
3.0 KiB
C
111 lines
3.0 KiB
C
/*
|
|
* (C) Copyright 2013
|
|
* Texas Instruments Incorporated.
|
|
* Lokesh Vutla <lokeshvutla@ti.com>
|
|
*
|
|
* Configuration settings for the TI DRA7XX board.
|
|
* See ti_omap5_common.h for omap5 common settings.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __CONFIG_DRA7XX_EVM_H
|
|
#define __CONFIG_DRA7XX_EVM_H
|
|
|
|
#define CONFIG_DRA7XX
|
|
|
|
/* MMC ENV related defines */
|
|
#define CONFIG_ENV_IS_IN_MMC
|
|
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
|
|
#define CONFIG_ENV_OFFSET 0xE0000
|
|
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
|
|
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
|
|
#define CONFIG_CMD_SAVEENV
|
|
|
|
#if (CONFIG_CONS_INDEX == 1)
|
|
#define CONSOLEDEV "ttyO0"
|
|
#elif (CONFIG_CONS_INDEX == 3)
|
|
#define CONSOLEDEV "ttyO2"
|
|
#endif
|
|
#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
|
|
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
|
|
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
|
|
#define CONFIG_BAUDRATE 115200
|
|
|
|
#define CONFIG_SYS_OMAP_ABE_SYSCK
|
|
|
|
/* Define the default GPT table for eMMC */
|
|
#define PARTS_DEFAULT \
|
|
"uuid_disk=${uuid_gpt_disk};" \
|
|
"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
|
|
|
|
#include <configs/ti_omap5_common.h>
|
|
|
|
/* Enhance our eMMC support / experience. */
|
|
#define CONFIG_CMD_GPT
|
|
#define CONFIG_EFI_PARTITION
|
|
#define CONFIG_PARTITION_UUIDS
|
|
#define CONFIG_CMD_PART
|
|
|
|
/* CPSW Ethernet */
|
|
#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
|
|
#define CONFIG_CMD_DHCP
|
|
#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
|
|
#define CONFIG_BOOTP_DNS2
|
|
#define CONFIG_BOOTP_SEND_HOSTNAME
|
|
#define CONFIG_BOOTP_GATEWAY
|
|
#define CONFIG_BOOTP_SUBNETMASK
|
|
#define CONFIG_NET_RETRY_COUNT 10
|
|
#define CONFIG_CMD_PING
|
|
#define CONFIG_CMD_MII
|
|
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
|
|
#define CONFIG_MII /* Required in net/eth.c */
|
|
#define CONFIG_PHY_GIGE /* per-board part of CPSW */
|
|
#define CONFIG_PHYLIB
|
|
|
|
/* SPI */
|
|
#undef CONFIG_OMAP3_SPI
|
|
#define CONFIG_TI_QSPI
|
|
#define CONFIG_SPI_FLASH
|
|
#define CONFIG_SPI_FLASH_SPANSION
|
|
#define CONFIG_CMD_SF
|
|
#define CONFIG_CMD_SPI
|
|
#define CONFIG_SPI_FLASH_BAR
|
|
#define CONFIG_TI_SPI_MMAP
|
|
#define CONFIG_SF_DEFAULT_SPEED 48000000
|
|
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
|
|
|
|
/* SPI SPL */
|
|
#define CONFIG_SPL_SPI_SUPPORT
|
|
#define CONFIG_SPL_SPI_LOAD
|
|
#define CONFIG_SPL_SPI_FLASH_SUPPORT
|
|
#define CONFIG_SPL_SPI_BUS 0
|
|
#define CONFIG_SPL_SPI_CS 0
|
|
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
|
|
|
|
#define CONFIG_SUPPORT_EMMC_BOOT
|
|
|
|
/* USB xHCI HOST */
|
|
#define CONFIG_CMD_USB
|
|
#define CONFIG_USB_HOST
|
|
#define CONFIG_USB_XHCI
|
|
#define CONFIG_USB_XHCI_OMAP
|
|
#define CONFIG_USB_STORAGE
|
|
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
|
|
|
|
#define CONFIG_OMAP_USB_PHY
|
|
#define CONFIG_OMAP_USB2PHY2_HOST
|
|
|
|
/* SATA */
|
|
#define CONFIG_BOARD_LATE_INIT
|
|
#define CONFIG_CMD_SCSI
|
|
#define CONFIG_LIBATA
|
|
#define CONFIG_SCSI_AHCI
|
|
#define CONFIG_SCSI_AHCI_PLAT
|
|
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
|
|
#define CONFIG_SYS_SCSI_MAX_LUN 1
|
|
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
|
|
CONFIG_SYS_SCSI_MAX_LUN)
|
|
|
|
#endif /* __CONFIG_DRA7XX_EVM_H */
|