a5d212a263
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
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| .. | ||
| config.mk | ||
| ddr.c | ||
| flash.c | ||
| law.c | ||
| Makefile | ||
| mpc8540eval.c | ||
| tlb.c | ||
| u-boot.lds | ||