36979c7e56
The back-to-bootrom support for Rockchip is equivalent to an (assembly) implementation of setjmp/longjmp (i.e. it saves the stack-pointer, link-register and callee-saved registers). Up until now, this had only been implemented for AArch32 (i.e. ARMv7 or older), which puts the new ARMv8 devices (which boot in AArch64 mode) at a slight disadvantage. To allow use of the 'back-to-bootrom' feature on new devices (e.g. the RK3368), this commit adds an implementation for AArch64. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
70 lines
1.3 KiB
ArmAsm
70 lines
1.3 KiB
ArmAsm
/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/linkage.h>
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#if defined(CONFIG_ARM64)
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.globl SAVE_SP_ADDR
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SAVE_SP_ADDR:
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.quad 0
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ENTRY(save_boot_params)
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sub sp, sp, #0x60
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stp x29, x30, [sp, #0x50]
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stp x27, x28, [sp, #0x40]
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stp x25, x26, [sp, #0x30]
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stp x23, x24, [sp, #0x20]
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stp x21, x22, [sp, #0x10]
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stp x19, x20, [sp, #0]
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ldr x8, =SAVE_SP_ADDR
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mov x9, sp
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str x9, [x8]
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b save_boot_params_ret /* back to my caller */
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ENDPROC(save_boot_params)
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.globl _back_to_bootrom_s
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ENTRY(_back_to_bootrom_s)
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ldr x0, =SAVE_SP_ADDR
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ldr x0, [x0]
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mov sp, x0
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ldp x29, x30, [sp, #0x50]
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ldp x27, x28, [sp, #0x40]
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ldp x25, x26, [sp, #0x30]
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ldp x23, x24, [sp, #0x20]
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ldp x21, x22, [sp, #0x10]
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ldp x19, x20, [sp]
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add sp, sp, #0x60
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mov x0, xzr
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ret
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ENDPROC(_back_to_bootrom_s)
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#else
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.globl SAVE_SP_ADDR
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SAVE_SP_ADDR:
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.word 0
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/*
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* void save_boot_params
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*
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* Save sp, lr, r1~r12
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*/
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ENTRY(save_boot_params)
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push {r1-r12, lr}
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ldr r0, =SAVE_SP_ADDR
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str sp, [r0]
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b save_boot_params_ret @ back to my caller
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ENDPROC(save_boot_params)
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.globl _back_to_bootrom_s
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ENTRY(_back_to_bootrom_s)
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ldr r0, =SAVE_SP_ADDR
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ldr sp, [r0]
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mov r0, #0
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pop {r1-r12, pc}
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ENDPROC(_back_to_bootrom_s)
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#endif
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