1b8114ac1e
PX5 evb has no ETH port, so disable it. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
74 lines
1.8 KiB
Plaintext
74 lines
1.8 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3368=y
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CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
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CONFIG_TPL_LIBCOMMON_SUPPORT=y
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CONFIG_TPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_TARGET_EVB_PX5=y
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL=y
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CONFIG_DEBUG_UART_BASE=0xFF1c0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_DEBUG_UART=y
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CONFIG_ANDROID_BOOT_IMAGE=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_BOOTSTAGE=y
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CONFIG_SPL_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_BOOTSTAGE_FDT=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_TPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_ATF=y
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CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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CONFIG_TPL=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_CACHE=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_TPL_OF_CONTROL=y
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CONFIG_OF_LIVE=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
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CONFIG_TPL_OF_PLATDATA=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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# CONFIG_NET is not set
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CONFIG_TPL_DM=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_TPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_TPL_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_TPL_CLK=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_TPL_RAM=y
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CONFIG_DM_RESET=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_DEBUG_UART_SKIP_INIT=y
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CONFIG_SYSRESET=y
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CONFIG_PANIC_HANG=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_TPL_TINY_MEMSET=y
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CONFIG_ERRNO_STR=y
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