83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
53 lines
1.4 KiB
C
53 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2008 Extreme Engineering Solutions, Inc.
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*/
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#ifndef __DS4510_H_
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#define __DS4510_H_
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/* General defines */
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#define DS4510_NUM_IO 0x04
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#define DS4510_IO_MASK ((1 << DS4510_NUM_IO) - 1)
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#define DS4510_EEPROM_PAGE_WRITE_DELAY_MS 20
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/* EEPROM from 0x00 - 0x39 */
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#define DS4510_EEPROM 0x00
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#define DS4510_EEPROM_SIZE 0x40
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#define DS4510_EEPROM_PAGE_SIZE 0x08
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#define DS4510_EEPROM_PAGE_OFFSET(x) ((x) & (DS4510_EEPROM_PAGE_SIZE - 1))
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/* SEEPROM from 0xf0 - 0xf7 */
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#define DS4510_SEEPROM 0xf0
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#define DS4510_SEEPROM_SIZE 0x08
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/* Registers overlapping SEEPROM from 0xf0 - 0xf7 */
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#define DS4510_PULLUP 0xF0
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#define DS4510_PULLUP_DIS 0x00
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#define DS4510_PULLUP_EN 0x01
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#define DS4510_RSTDELAY 0xF1
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#define DS4510_RSTDELAY_MASK 0x03
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#define DS4510_RSTDELAY_125 0x00
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#define DS4510_RSTDELAY_250 0x01
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#define DS4510_RSTDELAY_500 0x02
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#define DS4510_RSTDELAY_1000 0x03
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#define DS4510_IO3 0xF4
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#define DS4510_IO2 0xF5
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#define DS4510_IO1 0xF6
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#define DS4510_IO0 0xF7
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/* Status configuration registers from 0xf8 - 0xf9*/
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#define DS4510_IO_STATUS 0xF8
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#define DS4510_CFG 0xF9
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#define DS4510_CFG_READY 0x80
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#define DS4510_CFG_TRIP_POINT 0x40
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#define DS4510_CFG_RESET 0x20
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#define DS4510_CFG_SEE 0x10
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#define DS4510_CFG_SWRST 0x08
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/* SRAM from 0xfa - 0xff */
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#define DS4510_SRAM 0xfa
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#define DS4510_SRAM_SIZE 0x06
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#endif /* __DS4510_H_ */
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