83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
143 lines
4.8 KiB
C
143 lines
4.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* Ported from coreboot src/arch/x86/include/arch/pirq_routing.h
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*/
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#ifndef _PIRQ_ROUTING_H_
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#define _PIRQ_ROUTING_H_
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/*
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* This is the maximum number on interrupt entries that a PCI device may have.
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* This is NOT the number of slots or devices in the system
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* This is NOT the number of entries in the PIRQ table
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*
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* This tells us that in the PIRQ table, we are going to have 4 link-bitmap
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* entries per PCI device which is fixed at 4: INTA, INTB, INTC, and INTD.
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*
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* CAUTION: If you change this, PIRQ routing will not work correctly.
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*/
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#define MAX_INTX_ENTRIES 4
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#define PIRQ_SIGNATURE \
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(('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
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#define PIRQ_VERSION 0x0100
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struct __packed irq_info {
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u8 bus; /* Bus number */
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u8 devfn; /* Device and function number */
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struct __packed {
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u8 link; /* IRQ line ID, 0=not routed */
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u16 bitmap; /* Available IRQs */
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} irq[MAX_INTX_ENTRIES];
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u8 slot; /* Slot number, 0=onboard */
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u8 rfu;
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};
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struct __packed irq_routing_table {
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u32 signature; /* PIRQ_SIGNATURE */
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u16 version; /* PIRQ_VERSION */
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u16 size; /* Table size in bytes */
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u8 rtr_bus; /* busno of the interrupt router */
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u8 rtr_devfn; /* devfn of the interrupt router */
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u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
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u16 rtr_vendor; /* Vendor ID of the interrupt router */
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u16 rtr_device; /* Device ID of the interrupt router */
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u32 miniport_data;
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u8 rfu[11];
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u8 checksum; /* Modulo 256 checksum must give zero */
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struct irq_info slots[CONFIG_IRQ_SLOT_COUNT];
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};
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/**
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* get_irq_slot_count() - Get the number of entries in the irq_info table
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*
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* This calculates the number of entries for the irq_info table.
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*
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* @rt: pointer to the base address of the struct irq_info
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* @return: number of entries
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*/
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static inline int get_irq_slot_count(struct irq_routing_table *rt)
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{
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return (rt->size - 32) / sizeof(struct irq_info);
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}
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/**
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* pirq_check_irq_routed() - Check whether an IRQ is routed to 8259 PIC
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*
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* This function checks whether an IRQ is routed to 8259 PIC for a given link.
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*
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* Note: this function should be provided by the platform codes, as the
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* implementation of interrupt router may be different.
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*
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* @dev: irq router's udevice
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* @link: link number which represents a PIRQ
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* @irq: the 8259 IRQ number
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* @return: true if the irq is already routed to 8259 for a given link,
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* false elsewise
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*/
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bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq);
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/**
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* pirq_translate_link() - Translate a link value
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*
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* This function translates a platform-specific link value to a link number.
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* On Intel platforms, the link value is normally a offset into the PCI
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* configuration space into the legacy bridge.
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*
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* Note: this function should be provided by the platform codes, as the
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* implementation of interrupt router may be different.
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*
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* @dev: irq router's udevice
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* @link: platform-specific link value
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* @return: link number which represents a PIRQ
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*/
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int pirq_translate_link(struct udevice *dev, int link);
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/**
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* pirq_assign_irq() - Assign an IRQ to a PIRQ link
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*
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* This function assigns the IRQ to a PIRQ link so that the PIRQ is routed to
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* the 8259 PIC.
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*
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* Note: this function should be provided by the platform codes, as the
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* implementation of interrupt router may be different.
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*
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* @dev: irq router's udevice
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* @link: link number which represents a PIRQ
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* @irq: IRQ to which the PIRQ is routed
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*/
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void pirq_assign_irq(struct udevice *dev, int link, u8 irq);
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/**
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* pirq_route_irqs() - Route PIRQs to 8259 PIC
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*
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* This function configures all PCI devices' interrupt pins and maps them to
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* PIRQs and finally 8259 PIC. The routed irq number is written to interrupt
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* line register in the configuration space of the PCI device for OS to use.
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* The configuration source is taken from a struct irq_info table, the format
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* of which is defined in PIRQ routing table spec and PCI BIOS spec.
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*
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* @dev: irq router's udevice
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* @irq: pointer to the base address of the struct irq_info
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* @num: number of entries in the struct irq_info
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*/
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void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num);
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/**
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* copy_pirq_routing_table() - Copy a PIRQ routing table
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*
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* This helper function copies the given PIRQ routing table to a given address.
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* Before copying, it does several sanity tests against the PIRQ routing table.
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* It also fixes up the table checksum and align the given address to a 16 byte
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* boundary to meet the PIRQ routing table spec requirements.
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*
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* @addr: address to store the copied PIRQ routing table
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* @rt: pointer to the PIRQ routing table to copy from
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* @return: end address of the copied PIRQ routing table
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*/
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u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt);
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#endif /* _PIRQ_ROUTING_H_ */
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