ac67804fbb
This patch adds a unified s3c24x0 cpu header file that selects the header file for the specific s3c24x0 cpu from the SOC and CPU configs defined in board config file. This removes the current chain of s3c24-type #ifdef's from the s3c24x0 code. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
252 lines
8.1 KiB
C
252 lines
8.1 KiB
C
/*
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* (C) Copyright 2002, 2003
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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* Gary Jennejohn <garyj@denx.de>
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* David Mueller <d.mueller@elsoft.ch>
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*
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* Configuation settings for the MPL VCMA9 board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
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#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
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#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
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#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
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/* input clock of PLL */
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#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */
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#define USE_920T_MMU 1
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_BSP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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/***********************************************************
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* I2C stuff:
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* the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
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* address 0x50 with 16bit addressing
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***********************************************************/
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
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#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
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#define CONFIG_ENV_OFFSET 0x000 /* environment starts at offset 0 */
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#define CONFIG_ENV_SIZE 0x800 /* 2KB should be more than enough */
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#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes page write mode on 24C256 */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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/*
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* Size of malloc() pool
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*/
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/*#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)*/
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* BUNZIP2 needs a lot of RAM */
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/*
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* Hardware drivers
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*/
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#define CONFIG_NET_MULTI
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#define CONFIG_CS8900 /* we have a CS8900 on-board */
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#define CONFIG_CS8900_BASE 0x20000300
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#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
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#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
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/*
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* select serial console configuration
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*/
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#define CONFIG_S3C24X0_SERIAL
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
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/************************************************************
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* USB support
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************************************************************/
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#define CONFIG_USB_OHCI 1
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#define CONFIG_USB_KEYBOARD 1
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#define CONFIG_USB_STORAGE 1
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#define CONFIG_DOS_PARTITION 1
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/* Enable needed helper functions */
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#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
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/************************************************************
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* RTC
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************************************************************/
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#define CONFIG_RTC_S3C24X0 1
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 9600
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#define CONFIG_BOOTDELAY 5
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/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
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/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 10.0.0.110
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#define CONFIG_SERVERIP 10.0.0.1
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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/* what's this ? it's not used anywhere */
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#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "VCMA9 # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x30F80000 /* 15.5 MB in DRAM */
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */
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/* we configure PWM Timer 4 to 1us ~ 1MHz */
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/*#define CONFIG_SYS_HZ 1000000 */
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#define CONFIG_SYS_HZ 1562500
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/* support BZIP2 compression */
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#define CONFIG_BZIP2 1
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/************************************************************
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* Ident
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************************************************************/
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/*#define VERSION_TAG "released"*/
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#define VERSION_TAG "unstable"
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#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, MEV-10080-001 " VERSION_TAG
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
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#if 0
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#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
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#endif
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#ifdef CONFIG_AMD_LV800
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#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
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#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
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#endif
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#ifdef CONFIG_AMD_LV400
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#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
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#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
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#endif
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#if 0
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
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#endif
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#define CONFIG_SYS_JFFS2_FIRST_BANK 0
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
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#endif /* __CONFIG_H */
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