3048bcbf0b
These files were introduced with the IBM 405GP but are currently used on all 4xx PPC platforms. So the name doesn't match the content anymore. This patch renames the files to 4xx_pci.c/h. Signed-off-by: Stefan Roese <sr@denx.de>
986 lines
22 KiB
C
986 lines
22 KiB
C
/*
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* (C) Copyright 2002-2004
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* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <net.h>
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#include <asm/io.h>
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#include <pci.h>
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#include <asm/4xx_pci.h>
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#include <asm/processor.h>
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#include "pci405.h"
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#if defined(CONFIG_CMD_BSP)
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extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
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extern int do_bootvx (cmd_tbl_t *, int, int, char *[]);
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unsigned long get_dcr(unsigned short);
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/*
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* Command loadpci: wait for signal from host and boot image.
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*/
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int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unsigned int *ptr = 0;
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int count = 0;
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int count2 = 0;
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int status;
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int i;
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char addr[16];
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char str[] = "\\|/-";
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char *local_args[2];
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/*
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* Mark sync address
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*/
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ptr = 0;
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*ptr = 0xffffffff;
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puts("\nWaiting for image from pci host -");
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/*
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* Wait for host to write the start address
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*/
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while (*ptr == 0xffffffff) {
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count++;
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if (!(count % 100)) {
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count2++;
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putc(0x08); /* backspace */
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putc(str[count2 % 4]);
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}
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/* Abort if ctrl-c was pressed */
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if (ctrlc()) {
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puts("\nAbort\n");
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return 0;
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}
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udelay(1000);
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}
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if (*ptr == PCI_RECONFIG_MAGIC) {
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/*
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* Save own pci configuration in PRAM
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*/
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memset((char *)PCI_REGS_ADDR, 0, PCI_REGS_LEN);
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ptr = (unsigned int *)PCI_REGS_ADDR + 1;
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for (i=0; i<0x40; i+=4) {
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pci_read_config_dword(PCIDEVID_405GP, i, ptr++);
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}
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ptr = (unsigned int *)PCI_REGS_ADDR;
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*ptr = crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4);
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printf("\nStoring PCI Configuration Regs...\n");
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} else {
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sprintf(addr, "%08x", *ptr);
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#if 0
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/*
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* Boot image
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*/
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if (*ptr & 0x00000001) {
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/*
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* Boot VxWorks image via bootvx
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*/
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addr[strlen(addr)-1] = '0';
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printf("\nBooting VxWorks-Image at addr 0x%s ...\n", addr);
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setenv("loadaddr", addr);
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local_args[0] = argv[0];
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local_args[1] = NULL;
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status = do_bootvx (cmdtp, 0, 1, local_args);
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} else {
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/*
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* Boot image via bootm (normally Linux)
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*/
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printf("\nBooting Image at addr 0x%s ...\n", addr);
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setenv("loadaddr", addr);
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local_args[0] = argv[0];
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local_args[1] = NULL;
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status = do_bootm (cmdtp, 0, 1, local_args);
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}
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#else
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/*
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* Boot image via bootm
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*/
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printf("\nBooting Image at addr 0x%s ...\n", addr);
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setenv("loadaddr", addr);
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local_args[0] = argv[0];
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local_args[1] = NULL;
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status = do_bootm (cmdtp, 0, 1, local_args);
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#endif
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}
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return 0;
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}
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U_BOOT_CMD(
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loadpci, 1, 1, do_loadpci,
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"loadpci - Wait for pci-image and boot it\n",
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NULL
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);
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#endif
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#if 1 /* test-only */
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int do_getpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unsigned int val;
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int i;
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printf("\nPCI Configuration Regs for PPC405GP:");
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for (i=0; i<0x64; i+=4) {
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pci_read_config_dword(PCIDEVID_405GP, i, &val);
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if (!(i % 0x10)) {
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printf("\n%02x: ", i);
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}
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printf("%08x ", val);
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}
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printf("\n");
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return 0;
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}
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U_BOOT_CMD(
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getpci, 1, 1, do_getpci,
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"getpci - Print own pci configuration registers\n",
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NULL
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);
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int do_setpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unsigned int addr;
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unsigned int val;
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addr = simple_strtol (argv[1], NULL, 16);
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val = simple_strtol (argv[2], NULL, 16);
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printf("\nWriting %08x to PCI reg %08x.\n", val, addr);
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pci_write_config_dword(PCIDEVID_405GP, addr, val);
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return 0;
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}
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U_BOOT_CMD(
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setpci, 3, 1, do_setpci,
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"setpci - Set one pci configuration lword\n",
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"<addr> <val>\n"
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" - Write pci configuration lword <val> to <addr>.\n"
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);
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int do_dumpdcr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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int i;
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printf("\nDevice Configuration Registers (DCR's) for PPC405GP:");
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for (i=0; i<=0x1e0; i++) {
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if (!(i % 0x8)) {
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printf("\n%04x ", i);
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}
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printf("%08lx ", get_dcr(i));
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}
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printf("\n");
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return 0;
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}
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U_BOOT_CMD(
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dumpdcr, 1, 1, do_dumpdcr,
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"dumpdcr - Dump all DCR registers\n",
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NULL
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);
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int do_dumpspr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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printf("\nSpecial Purpose Registers (SPR's) for PPC405GP:");
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printf("\n%04x %08x ", 947, mfspr(947));
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printf("\n%04x %08x ", 9, mfspr(9));
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printf("\n%04x %08x ", 1014, mfspr(1014));
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printf("\n%04x %08x ", 1015, mfspr(1015));
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printf("\n%04x %08x ", 1010, mfspr(1010));
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printf("\n%04x %08x ", 957, mfspr(957));
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printf("\n%04x %08x ", 1008, mfspr(1008));
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printf("\n%04x %08x ", 1018, mfspr(1018));
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printf("\n%04x %08x ", 954, mfspr(954));
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printf("\n%04x %08x ", 950, mfspr(950));
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printf("\n%04x %08x ", 951, mfspr(951));
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printf("\n%04x %08x ", 981, mfspr(981));
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printf("\n%04x %08x ", 980, mfspr(980));
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printf("\n%04x %08x ", 982, mfspr(982));
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printf("\n%04x %08x ", 1012, mfspr(1012));
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printf("\n%04x %08x ", 1013, mfspr(1013));
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printf("\n%04x %08x ", 948, mfspr(948));
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printf("\n%04x %08x ", 949, mfspr(949));
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printf("\n%04x %08x ", 1019, mfspr(1019));
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printf("\n%04x %08x ", 979, mfspr(979));
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printf("\n%04x %08x ", 8, mfspr(8));
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printf("\n%04x %08x ", 945, mfspr(945));
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printf("\n%04x %08x ", 987, mfspr(987));
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printf("\n%04x %08x ", 287, mfspr(287));
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printf("\n%04x %08x ", 953, mfspr(953));
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printf("\n%04x %08x ", 955, mfspr(955));
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printf("\n%04x %08x ", 272, mfspr(272));
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printf("\n%04x %08x ", 273, mfspr(273));
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printf("\n%04x %08x ", 274, mfspr(274));
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printf("\n%04x %08x ", 275, mfspr(275));
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printf("\n%04x %08x ", 260, mfspr(260));
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printf("\n%04x %08x ", 276, mfspr(276));
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printf("\n%04x %08x ", 261, mfspr(261));
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printf("\n%04x %08x ", 277, mfspr(277));
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printf("\n%04x %08x ", 262, mfspr(262));
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printf("\n%04x %08x ", 278, mfspr(278));
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printf("\n%04x %08x ", 263, mfspr(263));
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printf("\n%04x %08x ", 279, mfspr(279));
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printf("\n%04x %08x ", 26, mfspr(26));
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printf("\n%04x %08x ", 27, mfspr(27));
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printf("\n%04x %08x ", 990, mfspr(990));
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printf("\n%04x %08x ", 991, mfspr(991));
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printf("\n%04x %08x ", 956, mfspr(956));
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printf("\n%04x %08x ", 284, mfspr(284));
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printf("\n%04x %08x ", 285, mfspr(285));
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printf("\n%04x %08x ", 986, mfspr(986));
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printf("\n%04x %08x ", 984, mfspr(984));
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printf("\n%04x %08x ", 256, mfspr(256));
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printf("\n%04x %08x ", 1, mfspr(1));
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printf("\n%04x %08x ", 944, mfspr(944));
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printf("\n");
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return 0;
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}
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U_BOOT_CMD(
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dumpspr, 1, 1, do_dumpspr,
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"dumpspr - Dump all SPR registers\n",
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NULL
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);
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#define PCI0_BRDGOPT1 0x4a
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#define plb0_acr 0x87
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int do_getplb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unsigned short val;
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printf("PLB0_ACR=%08lx\n", get_dcr(0x87));
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pci_read_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, &val);
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printf("PCI0_BRDGOPT1=%04x\n", val);
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printf("CCR0=%08x\n", mfspr(ccr0));
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return 0;
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}
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U_BOOT_CMD(
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getplb, 1, 1, do_getplb,
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"getplb - Dump all plb arbiter registers\n",
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NULL
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);
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int do_setplb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unsigned int my_acr;
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unsigned int my_brdgopt1;
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unsigned int my_ccr0;
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my_acr = simple_strtol (argv[1], NULL, 16);
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my_brdgopt1 = simple_strtol (argv[2], NULL, 16);
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my_ccr0 = simple_strtol (argv[3], NULL, 16);
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mtdcr(plb0_acr, my_acr);
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pci_write_config_word(PCIDEVID_405GP, PCI0_BRDGOPT1, my_brdgopt1);
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mtspr(ccr0, my_ccr0);
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return 0;
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}
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U_BOOT_CMD(
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setplb, 4, 1, do_setplb,
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"setplb - Set all plb arbiter registers\n",
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"PLB0_ACR PCI0_BRDGOPT1 CCR0\n"
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" - Set all plb arbiter registers\n"
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);
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/***********************************************************************
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*
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* The following code is only for test purposes!!!!
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* Please ignore this ugly stuff!!!!!!!!!!!!!!!!!!!
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*
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***********************************************************************/
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#define PCI_ADDR 0xc0000000
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int do_writepci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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unsigned int addr;
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unsigned int size;
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unsigned int countmax;
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int i;
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int max;
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volatile unsigned long *ptr;
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volatile unsigned long val;
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int loopcount = 0;
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int test_pci_read = 0;
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int test_pci_cfg_write = 0;
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int test_sync = 0;
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int test_pci_pre_read = 0;
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addr = simple_strtol (argv[1], NULL, 16);
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size = simple_strtol (argv[2], NULL, 16);
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countmax = simple_strtol (argv[3], NULL, 16);
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if (countmax == 0)
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countmax = 1000;
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do_getplb(NULL, 0, 0, NULL);
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#if 0
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out32r(PMM0LA, 0);
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out32r(PMM0PCILA, 0);
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out32r(PMM0PCIHA, 0);
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out32r(PMM0MA, 0);
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out32r(PMM1LA, PCI_ADDR);
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out32r(PMM1PCILA, addr & 0xff000000);
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out32r(PMM1PCIHA, 0x00000000);
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out32r(PMM1MA, 0xff000001);
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#endif
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printf("PMM1LA =%08lx\n", in32r(PMM1LA));
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printf("PMM1MA =%08lx\n", in32r(PMM1MA));
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printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
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printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
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addr = PCI_ADDR | (addr & 0x00ffffff);
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printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
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max = size >> 2;
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pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
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val = *(ulong *)0x00000000;
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if (val & 0x00000008) {
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test_pci_pre_read = 1;
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printf("Running test with pre pci-memory-read access!\n");
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}
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if (val & 0x00000004) {
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test_sync = 1;
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printf("Running test with sync instruction!\n");
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}
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if (val & 0x00000001) {
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test_pci_read = 1;
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printf("Running test with pci-memory-read access!\n");
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}
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if (val & 0x00000002) {
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test_pci_cfg_write = 1;
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printf("Running test with pci-config-write access!\n");
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}
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while (1) {
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if (test_pci_pre_read) {
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/*
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* Read one value back
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*/
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ptr = (volatile unsigned long *)addr;
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val = *ptr;
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}
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/*
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* Write some values to host via pci busmastering
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*/
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ptr = (volatile unsigned long *)addr;
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for (i=0; i<max; i++) {
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*ptr++ = i;
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}
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if (test_sync) {
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/*
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* Sync previous writes
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*/
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ppcSync();
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}
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if (test_pci_read) {
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/*
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* Read one value back
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*/
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ptr = (volatile unsigned long *)addr;
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val = *ptr;
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}
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if (test_pci_cfg_write) {
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/*
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* Generate IRQ to host via config regs
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*/
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pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00);
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}
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if (loopcount++ > countmax) {
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/* Abort if ctrl-c was pressed */
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if (ctrlc()) {
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puts("\nAbort\n");
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return 0;
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}
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putc('.');
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loopcount = 0;
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}
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}
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return 0;
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}
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U_BOOT_CMD(
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writepci, 4, 1, do_writepci,
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"writepci - Write some data to pcibus\n",
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"<addr> <size>\n"
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" - Write some data to pcibus.\n"
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);
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#define PCI_CFGADDR 0xeec00000
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#define PCI_CFGDATA 0xeec00004
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int ibmPciConfigWrite
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(
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int offset, /* offset into the configuration space */
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int width, /* data width */
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unsigned int data /* data to be written */
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)
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{
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/*
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* Write config register address to the PCI config address register
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* bit 31 must be 1 and bits 1:0 must be 0 (note LE bit notation)
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*/
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out32r(PCI_CFGADDR, 0x80000000 | (offset & 0xFFFFFFFC));
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#if 0 /* test-only */
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ppcSync();
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#endif
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/*
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* Write value to be written to the PCI config data register
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*/
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switch ( width ) {
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case 1: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned char)(data & 0xFF));
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break;
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case 2: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned short)(data & 0xFFFF));
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break;
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case 4: out32r(PCI_CFGDATA | (offset & 0x3), data);
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break;
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}
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return (0);
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}
|
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|
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int do_writepci2(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
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{
|
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unsigned int addr;
|
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unsigned int size;
|
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unsigned int countmax;
|
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int max;
|
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volatile unsigned long *ptr;
|
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volatile unsigned long val;
|
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int loopcount = 0;
|
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|
|
addr = simple_strtol (argv[1], NULL, 16);
|
|
size = simple_strtol (argv[2], NULL, 16);
|
|
countmax = simple_strtol (argv[3], NULL, 16);
|
|
if (countmax == 0)
|
|
countmax = 1000;
|
|
|
|
do_getplb(NULL, 0, 0, NULL);
|
|
|
|
#if 0
|
|
out32r(PMM0LA, 0);
|
|
out32r(PMM0PCILA, 0);
|
|
out32r(PMM0PCIHA, 0);
|
|
out32r(PMM0MA, 0);
|
|
out32r(PMM1LA, PCI_ADDR);
|
|
out32r(PMM1PCILA, addr & 0xff000000);
|
|
out32r(PMM1PCIHA, 0x00000000);
|
|
out32r(PMM1MA, 0xff000001);
|
|
#endif
|
|
|
|
printf("PMM1LA =%08lx\n", in32r(PMM1LA));
|
|
printf("PMM1MA =%08lx\n", in32r(PMM1MA));
|
|
printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
|
|
printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
|
|
|
|
addr = PCI_ADDR | (addr & 0x00ffffff);
|
|
printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
|
|
|
|
max = size >> 2;
|
|
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
while (1) {
|
|
|
|
/*
|
|
* Write one values to host via pci busmastering
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
*ptr = 0x01234567;
|
|
|
|
/*
|
|
* Read one value back
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
val = *ptr;
|
|
|
|
/*
|
|
* One pci config write
|
|
*/
|
|
/* pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00); */
|
|
/* ibmPciConfigWrite(0x44, 1, 0x00); */
|
|
ibmPciConfigWrite(0x2e, 2, 0x1234); /* subsystem id */
|
|
|
|
if (loopcount++ > countmax) {
|
|
/* Abort if ctrl-c was pressed */
|
|
if (ctrlc()) {
|
|
puts("\nAbort\n");
|
|
return 0;
|
|
}
|
|
|
|
putc('.');
|
|
|
|
loopcount = 0;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writepci2, 4, 1, do_writepci2,
|
|
"writepci2- Write some data to pcibus\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
int do_writepci22(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unsigned int addr;
|
|
unsigned int size;
|
|
unsigned int countmax = 0;
|
|
volatile unsigned long *ptr;
|
|
volatile unsigned long val;
|
|
|
|
addr = simple_strtol (argv[1], NULL, 16);
|
|
size = simple_strtol (argv[2], NULL, 16);
|
|
|
|
addr = PCI_ADDR | (addr & 0x00ffffff);
|
|
printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
while (1) {
|
|
|
|
/*
|
|
* Write one values to host via pci busmastering
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
*ptr = 0x01234567;
|
|
|
|
/*
|
|
* Read one value back
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
val = *ptr;
|
|
|
|
/*
|
|
* One pci config write
|
|
*/
|
|
ibmPciConfigWrite(0x2e, 2, 0x1234); /* subsystem id */
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writepci22, 4, 1, do_writepci22,
|
|
"writepci22- Write some data to pcibus\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
int ibmPciConfigWrite3
|
|
(
|
|
int offset, /* offset into the configuration space */
|
|
int width, /* data width */
|
|
unsigned int data /* data to be written */
|
|
)
|
|
{
|
|
/*
|
|
* Write config register address to the PCI config address register
|
|
* bit 31 must be 1 and bits 1:0 must be 0 (note LE bit notation)
|
|
*/
|
|
out32r(PCI_CFGADDR, 0x80000000 | (offset & 0xFFFFFFFC));
|
|
|
|
#if 1 /* test-only */
|
|
ppcSync();
|
|
#endif
|
|
|
|
/*
|
|
* Write value to be written to the PCI config data register
|
|
*/
|
|
switch ( width ) {
|
|
case 1: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned char)(data & 0xFF));
|
|
break;
|
|
case 2: out32r(PCI_CFGDATA | (offset & 0x3), (unsigned short)(data & 0xFFFF));
|
|
break;
|
|
case 4: out32r(PCI_CFGDATA | (offset & 0x3), data);
|
|
break;
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
int do_writepci3(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unsigned int addr;
|
|
unsigned int size;
|
|
unsigned int countmax;
|
|
int max;
|
|
volatile unsigned long *ptr;
|
|
volatile unsigned long val;
|
|
int loopcount = 0;
|
|
|
|
addr = simple_strtol (argv[1], NULL, 16);
|
|
size = simple_strtol (argv[2], NULL, 16);
|
|
countmax = simple_strtol (argv[3], NULL, 16);
|
|
if (countmax == 0)
|
|
countmax = 1000;
|
|
|
|
do_getplb(NULL, 0, 0, NULL);
|
|
|
|
#if 0
|
|
out32r(PMM0LA, 0);
|
|
out32r(PMM0PCILA, 0);
|
|
out32r(PMM0PCIHA, 0);
|
|
out32r(PMM0MA, 0);
|
|
out32r(PMM1LA, PCI_ADDR);
|
|
out32r(PMM1PCILA, addr & 0xff000000);
|
|
out32r(PMM1PCIHA, 0x00000000);
|
|
out32r(PMM1MA, 0xff000001);
|
|
#endif
|
|
|
|
printf("PMM1LA =%08lx\n", in32r(PMM1LA));
|
|
printf("PMM1MA =%08lx\n", in32r(PMM1MA));
|
|
printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
|
|
printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
|
|
|
|
addr = PCI_ADDR | (addr & 0x00ffffff);
|
|
printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
|
|
|
|
max = size >> 2;
|
|
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
while (1) {
|
|
|
|
/*
|
|
* Write one values to host via pci busmastering
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
*ptr = 0x01234567;
|
|
|
|
/*
|
|
* Read one value back
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
val = *ptr;
|
|
|
|
/*
|
|
* One pci config write
|
|
*/
|
|
/* pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00); */
|
|
/* ibmPciConfigWrite(0x44, 1, 0x00); */
|
|
ibmPciConfigWrite3(0x2e, 2, 0x1234); /* subsystem id */
|
|
|
|
if (loopcount++ > countmax) {
|
|
/* Abort if ctrl-c was pressed */
|
|
if (ctrlc()) {
|
|
puts("\nAbort\n");
|
|
return 0;
|
|
}
|
|
|
|
putc('.');
|
|
|
|
loopcount = 0;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writepci3, 4, 1, do_writepci3,
|
|
"writepci3- Write some data to pcibus\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
|
|
#define SECTOR_SIZE 32 /* 32 byte cache line */
|
|
#define SECTOR_MASK 0x1F
|
|
|
|
void my_flush_dcache(ulong lcl_addr, ulong count)
|
|
{
|
|
unsigned int lcl_target;
|
|
|
|
/* promote to nearest cache sector */
|
|
lcl_target = (lcl_addr + count + SECTOR_SIZE - 1) & ~SECTOR_MASK;
|
|
lcl_addr &= ~SECTOR_MASK;
|
|
while (lcl_addr != lcl_target)
|
|
{
|
|
/* ppcDcbf((void *)lcl_addr);*/
|
|
__asm__("dcbf 0,%0": :"r" (lcl_addr));
|
|
lcl_addr += SECTOR_SIZE;
|
|
}
|
|
__asm__("sync"); /* Always flush prefetch queue in any case */
|
|
}
|
|
|
|
int do_writepci_cache(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unsigned int addr;
|
|
unsigned int size;
|
|
unsigned int countmax;
|
|
int i;
|
|
volatile unsigned long *ptr;
|
|
volatile unsigned long val;
|
|
int loopcount = 0;
|
|
|
|
addr = simple_strtol (argv[1], NULL, 16);
|
|
size = simple_strtol (argv[2], NULL, 16);
|
|
countmax = simple_strtol (argv[3], NULL, 16);
|
|
if (countmax == 0)
|
|
countmax = 1000;
|
|
|
|
do_getplb(NULL, 0, 0, NULL);
|
|
|
|
#if 0
|
|
out32r(PMM0LA, 0);
|
|
out32r(PMM0PCILA, 0);
|
|
out32r(PMM0PCIHA, 0);
|
|
out32r(PMM0MA, 0);
|
|
out32r(PMM1LA, PCI_ADDR);
|
|
out32r(PMM1PCILA, addr & 0xff000000);
|
|
out32r(PMM1PCIHA, 0x00000000);
|
|
out32r(PMM1MA, 0xff000001);
|
|
#endif
|
|
|
|
printf("PMM1LA =%08lx\n", in32r(PMM1LA));
|
|
printf("PMM1MA =%08lx\n", in32r(PMM1MA));
|
|
printf("PMM1PCILA =%08lx\n", in32r(PMM1PCILA));
|
|
printf("PMM1PCIHA =%08lx\n", in32r(PMM1PCIHA));
|
|
|
|
addr = PCI_ADDR | (addr & 0x00ffffff);
|
|
printf("\nWriting at addr %08x, size %08x (countmax=%x)\n", addr, size, countmax);
|
|
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
i = 0;
|
|
|
|
/*
|
|
* Set pci region as cachable
|
|
*/
|
|
ppcSync();
|
|
__asm__ volatile (" addis 4,0,0x0000 ");
|
|
__asm__ volatile (" addi 4,4,0x0080 ");
|
|
__asm__ volatile (" mtdccr 4 ");
|
|
ppcSync();
|
|
|
|
while (1) {
|
|
|
|
/*
|
|
* Write one values to host via pci busmastering
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
printf("A\n"); /* test-only */
|
|
*ptr++ = i++;
|
|
*ptr++ = i++;
|
|
*ptr++ = i++;
|
|
*ptr++ = i++;
|
|
*ptr++ = i++;
|
|
*ptr++ = i++;
|
|
*ptr++ = i++;
|
|
*ptr++ = i++;
|
|
printf("B\n"); /* test-only */
|
|
my_flush_dcache(addr, 32);
|
|
printf("C\n"); /* test-only */
|
|
|
|
/*
|
|
* Read one value back
|
|
*/
|
|
ptr = (volatile unsigned long *)addr;
|
|
val = *ptr;
|
|
printf("D\n"); /* test-only */
|
|
|
|
/*
|
|
* One pci config write
|
|
*/
|
|
/* pci_write_config_byte(PCIDEVID_405GP, 0x44, 0x00); */
|
|
/* ibmPciConfigWrite(0x44, 1, 0x00); */
|
|
ibmPciConfigWrite3(0x2e, 2, 0x1234); /* subsystem id */
|
|
printf("E\n"); /* test-only */
|
|
|
|
if (loopcount++ > countmax) {
|
|
/* Abort if ctrl-c was pressed */
|
|
if (ctrlc()) {
|
|
puts("\nAbort\n");
|
|
return 0;
|
|
}
|
|
|
|
putc('.');
|
|
|
|
loopcount = 0;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writepci_cache, 4, 1, do_writepci_cache,
|
|
"writepci_cache - Write some data to pcibus\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
int do_savepci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unsigned int *ptr;
|
|
int i;
|
|
|
|
/*
|
|
* Save own pci configuration in PRAM
|
|
*/
|
|
memset((char *)PCI_REGS_ADDR, 0, PCI_REGS_LEN);
|
|
ptr = (unsigned int *)PCI_REGS_ADDR + 1;
|
|
for (i=0; i<0x40; i+=4) {
|
|
pci_read_config_dword(PCIDEVID_405GP, i, ptr++);
|
|
}
|
|
ptr = (unsigned int *)PCI_REGS_ADDR;
|
|
*ptr = crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4);
|
|
|
|
printf("\nStoring PCI Configuration Regs...\n");
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
savepci, 4, 1, do_savepci,
|
|
"savepci - Save all pci regs\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
int do_restorepci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
unsigned int *ptr;
|
|
int i;
|
|
|
|
/*
|
|
* Rewrite pci config regs (only after soft-reset with magic set)
|
|
*/
|
|
ptr = (unsigned int *)PCI_REGS_ADDR;
|
|
if (crc32(0, (uchar *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
|
|
puts("Restoring PCI Configurations Regs!\n");
|
|
ptr = (unsigned int *)PCI_REGS_ADDR + 1;
|
|
for (i=0; i<0x40; i+=4) {
|
|
pci_write_config_dword(PCIDEVID_405GP, i, *ptr++);
|
|
}
|
|
}
|
|
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
restorepci, 4, 1, do_restorepci,
|
|
"restorepci - Restore all pci regs\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
|
|
extern void write_without_sync(void);
|
|
extern void write_with_sync(void);
|
|
extern void write_with_less_sync(void);
|
|
extern void write_with_more_sync(void);
|
|
|
|
/*
|
|
* code from IBM-PPCSUPP
|
|
*/
|
|
int do_writeibm1(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
write_without_sync();
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writeibm1, 4, 1, do_writeibm1,
|
|
"writeibm1- Write some data to pcibus (without sync)\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
int do_writeibm2(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
write_with_sync();
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writeibm2, 4, 1, do_writeibm2,
|
|
"writeibm2- Write some data to pcibus (with sync)\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
int do_writeibm22(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
write_with_less_sync();
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writeibm22, 4, 1, do_writeibm22,
|
|
"writeibm22- Write some data to pcibus (with less sync)\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
|
|
int do_writeibm3(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
{
|
|
pci_write_config_word(PCIDEVID_405GP, 0x04, 0x0106); /* write command reg */
|
|
|
|
write_with_more_sync();
|
|
|
|
return 0;
|
|
}
|
|
U_BOOT_CMD(
|
|
writeibm3, 4, 1, do_writeibm3,
|
|
"writeibm3- Write some data to pcibus (with more sync)\n",
|
|
"<addr> <size>\n"
|
|
" - Write some data to pcibus.\n"
|
|
);
|
|
#endif
|