1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
129 lines
2.9 KiB
C
129 lines
2.9 KiB
C
/*
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* da8xx.c - TI's DA8xx platform specific usb wrapper functions.
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*
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* Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
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*
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* Based on drivers/usb/musb/davinci.c
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*
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* Copyright (C) 2009 Texas Instruments Incorporated
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include "musb_core.h"
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#include <asm/arch/da8xx-usb.h>
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/* MUSB platform configuration */
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struct musb_config musb_cfg = {
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.regs = (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
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.timeout = DA8XX_USB_OTG_TIMEOUT,
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.musb_speed = 0,
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};
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/*
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* This function enables VBUS by driving the GPIO Bank4 Pin 15 high.
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*/
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static void enable_vbus(void)
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{
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u32 value;
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/* configure GPIO bank4 pin 15 in output direction */
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value = readl(&davinci_gpio_bank45->dir);
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writel((value & (~DA8XX_USB_VBUS_GPIO)), &davinci_gpio_bank45->dir);
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/* set GPIO bank4 pin 15 high to drive VBUS */
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value = readl(&davinci_gpio_bank45->set_data);
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writel((value | DA8XX_USB_VBUS_GPIO), &davinci_gpio_bank45->set_data);
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}
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/*
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* Enable the usb0 phy. This initialization procedure is explained in
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* the DA8xx USB user guide document.
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*/
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static u8 phy_on(void)
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{
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u32 timeout;
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u32 cfgchip2;
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cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
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cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
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CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ);
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cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
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CFGCHIP2_REFFREQ_24MHZ;
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writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
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/* wait until the usb phy pll locks */
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timeout = musb_cfg.timeout;
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while (timeout--)
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if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
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return 1;
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/* USB phy was not turned on */
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return 0;
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}
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/*
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* Disable the usb phy
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*/
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static void phy_off(void)
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{
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u32 cfgchip2;
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/*
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* Power down the on-chip PHY.
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*/
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cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
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cfgchip2 &= ~CFGCHIP2_PHY_PLLON;
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cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN;
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writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
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}
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/*
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* This function performs DA8xx platform specific initialization for usb0.
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*/
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int musb_platform_init(void)
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{
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u32 revision;
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/* enable psc for usb2.0 */
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lpsc_on(33);
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/* enable usb vbus */
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enable_vbus();
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/* reset the controller */
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writel(0x1, &da8xx_usb_regs->control);
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udelay(5000);
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/* start the on-chip usb phy and its pll */
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if (phy_on() == 0)
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return -1;
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/* Returns zero if e.g. not clocked */
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revision = readl(&da8xx_usb_regs->revision);
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if (revision == 0)
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return -1;
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/* Disable all interrupts */
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writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
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DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set);
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return 0;
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}
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/*
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* This function performs DA8xx platform specific deinitialization for usb0.
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*/
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void musb_platform_deinit(void)
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{
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/* Turn of the phy */
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phy_off();
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/* flush any interrupts */
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writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
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DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr);
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writel(0, &da8xx_usb_regs->eoi);
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}
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