c9bb942e2f
Some archs/boards specify their own default by pre-defining the config which causes the Kconfig system to mix up the order of the configs in the defconfigs... This will cause merge pain if allowed to proliferate. Remove the configs that behave this way from the archs. A few configs still remain, but that is because they only exist as defaults and do not have a proper Kconfig entry. Those appear to be: SPIFLASH DISPLAY_BOARDINFO Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates, drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM] Signed-off-by: Tom Rini <trini@konsulko.com>
114 lines
2.8 KiB
C
114 lines
2.8 KiB
C
/*
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* include/configs/lager.h
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* This file is lager board configuration.
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*
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* Copyright (C) 2013, 2014 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __LAGER_H
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#define __LAGER_H
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#undef DEBUG
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#define CONFIG_R8A7790
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#define CONFIG_RMOBILE_BOARD_STRING "Lager"
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#include "rcar-gen2-common.h"
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#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
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#define CONFIG_SYS_TEXT_BASE 0xB0000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0xE8080000
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#endif
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/* STACK */
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#if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
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#define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC
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#else
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#define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC
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#endif
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#define STACK_AREA_SIZE 0xC000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE
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/* SPI */
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#define CONFIG_SPI
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SH_QSPI
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#define CONFIG_SPI_FLASH_SPANSION
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#define CONFIG_SYS_NO_FLASH
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/* SH Ether */
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#define CONFIG_SH_ETHER
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_RCAR
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#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
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#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
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#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
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#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
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#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
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#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
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#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
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#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
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#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
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#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
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#define CONFIG_SYS_TMU_CLK_DIV 4
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/* USB */
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_RMOBILE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
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#define CONFIG_USB_STORAGE
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/* MMC */
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_SH_MMCIF
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#define CONFIG_SH_MMCIF_ADDR 0xEE220000
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#define CONFIG_SH_MMCIF_CLK 97500000
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/* Module stop status bits */
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/* INTC-RT */
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#define CONFIG_SMSTP0_ENA 0x00400000
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/* MSIF */
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#define CONFIG_SMSTP2_ENA 0x00002000
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/* INTC-SYS, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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/* SCIF0 */
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#define CONFIG_SMSTP7_ENA 0x00200000
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/* SDHI */
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#define CONFIG_SH_SDHI_FREQ 97500000
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#endif /* __LAGER_H */
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