York Sun a1d558a20f powerpc/mpc85xx: Add workaround for DDR erratum A004934 ... After DDR controller is enabled, it performs a calibration for the transmit data vs DQS paths. During this calibration, the DDR controller may make an inaccurate calculation, resulting in a non-optimal tap point. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>		2012-10-22 14:31:29 -05:00
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cpu	powerpc/mpc85xx: Add workaround for DDR erratum A004934	2012-10-22 14:31:29 -05:00
include/asm	powerpc/mpc85xx: Add workaround for DDR erratum A004934	2012-10-22 14:31:29 -05:00
lib	powerpc/mpc85xx: software workaround for DDR erratum A-004468	2012-10-22 14:31:28 -05:00
config.mk	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00