289f932c5f
* Patch by Richard Woodruff, 10 Jan 2005: Update support for OMAP2420 (ARM11) and H4 board: o clean up and add new types to H4 memory probe code. o fix to work with internal boot. o added PRCM config III operation. o fix marginal flash timings. o add revison ATAG usage. o enable voltage scaling at power chip. o fix compile error for i2c. * Fix network problem (error when receiving multiple ARP packets)
538 lines
12 KiB
C
538 lines
12 KiB
C
/*
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* (C) Copyright 2001
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2001-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2003
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* Texas Instruments, <www.ti.com>
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* Kshitij Gupta <Kshitij@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/sizes.h>
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#include <linux/byteorder/swab.h>
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#define PHYS_FLASH_SECT_SIZE SZ_128K
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/* Board support for 1 or 2 flash devices */
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#undef FLASH_PORT_WIDTH32
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#define FLASH_PORT_WIDTH16
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#ifdef FLASH_PORT_WIDTH16
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# define FLASH_PORT_WIDTH ushort
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# define FLASH_PORT_WIDTHV vu_short
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# define SWAP(x) __swab16(x)
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#else
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# define FLASH_PORT_WIDTH ulong
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# define FLASH_PORT_WIDTHV vu_long
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# define SWAP(x) __swab32(x)
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#endif
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#define FPW FLASH_PORT_WIDTH
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#define FPWV FLASH_PORT_WIDTHV
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#define mb() __asm__ __volatile__ ("" : : : "memory")
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/* Flash Organization Structure */
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typedef struct OrgDef {
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unsigned int sector_number;
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unsigned int sector_size;
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} OrgDef;
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/* Flash Organizations */
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OrgDef OrgIntel_28F256L18T[] = {
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{4, SZ_32K}, /* 4 * 32kBytes sectors */
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{255, SZ_128K}, /* 255 * 128kBytes sectors */
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};
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/*-----------------------------------------------------------------------
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* Functions
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*/
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unsigned long flash_init (void);
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static ulong flash_get_size (FPW * addr, flash_info_t * info);
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static int write_data (flash_info_t * info, ulong dest, FPW data);
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static void flash_get_offsets (ulong base, flash_info_t * info);
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void inline spin_wheel (void);
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void flash_print_info (flash_info_t * info);
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void flash_unprotect_sectors (FPWV * addr);
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int flash_erase (flash_info_t * info, int s_first, int s_last);
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
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void flash_unlock(flash_info_t * info, int bank);
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int flash_probe(void);
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/*-----------------------------------------------------------------------
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*/
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/* see if flash is ok */
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int flash_probe(void)
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{
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return(flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[0]));
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}
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unsigned long flash_init (void)
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{
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int i;
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ulong size = 0;
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for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
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switch (i) {
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case 0:
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flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
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flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
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/* to reset the lock bit */
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flash_unlock(&flash_info[i],i);
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break;
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case 1:
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flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
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flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
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/* to reset the lock bit */
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flash_unlock(&flash_info[i],i);
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break;
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default:
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panic ("configured too many flash banks!\n");
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break;
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}
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size += flash_info[i].size;
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}
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#ifdef CFG_ENV_IS_IN_FLASH
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/* Protect monitor and environment sectors
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*/
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flash_protect (FLAG_PROTECT_SET,
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CFG_FLASH_BASE,
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CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
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flash_protect (FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
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#endif
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_unlock(flash_info_t * info, int bank)
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{
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int j;
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if (!bank)
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j=2; /* leave 0,1 locked for boot bank */
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else
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j=0; /* get the whole bank for #2 */
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for (;j<CFG_MAX_FLASH_SECT;j++) {
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FPWV *addr = (FPWV *) (info->start[j]);
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if (addr == NULL) {
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printf("Warning Flash probe failed\n");
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break;
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}
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flash_unprotect_sectors (addr);
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*addr = (FPW) 0x00500050;/* clear status register */
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*addr = (FPW) 0x00FF00FF;/* resest to read mode */
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}
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_get_offsets (ulong base, flash_info_t * info)
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{
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int i;
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volatile int r; /* gcc 3.4.0-1 strangeness, need to follow up.*/
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if (info->flash_id == FLASH_UNKNOWN) {
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return;
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}
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
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for (i = 0; i < info->sector_count; i++) {
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if (i > 254) { /* 255,256,257,258 */
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r=i;
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info->start[i] = base + (((r-(int)255) * SZ_32K) + (255*PHYS_FLASH_SECT_SIZE));
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info->protect[i] = 0;
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} else {
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info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
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info->protect[i] = 0;
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}
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}
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t * info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL:
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printf ("INTEL ");
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break;
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default:
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printf ("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F256L18T:
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printf ("FLASH 28F256L18T\n");
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break;
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default:
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printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i], info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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return;
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size (FPW * addr, flash_info_t * info)
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{
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volatile FPW value;
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/* mb(); this one makes ARM11 err go away, but I want it :) as a guide to problems */
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/* Write auto select command: read Manufacturer ID */
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addr[0x5555] = (FPW) 0x00AA00AA;
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addr[0x2AAA] = (FPW) 0x00550055;
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addr[0x5555] = (FPW) 0x00900090;
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mb ();
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value = addr[0] & 0xFF; /* just looking for 89 (8989 is hw pat)*/
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switch (value) {
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case (FPW) INTEL_MANUFACT:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
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return(0); /* no or unknown flash */
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}
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mb ();
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value = addr[1]; /* device ID */
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switch (value) {
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case (FPW) (INTEL_ID_28F256L18T): /* 880D */
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info->flash_id += FLASH_28F256L18T;
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info->sector_count = 259; /*0-258*/
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info->size = SZ_32M;
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break; /* => 32 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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break;
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}
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if (info->sector_count > CFG_MAX_FLASH_SECT) {
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printf ("** ERROR: sector count %d > max (%d) **\n",
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info->sector_count, CFG_MAX_FLASH_SECT);
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info->sector_count = CFG_MAX_FLASH_SECT;
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}
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addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
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return(info->size);
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}
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/* unprotects a sector for write and erase
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* on some intel parts, this unprotects the entire chip, but it
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* wont hurt to call this additional times per sector...
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*/
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void flash_unprotect_sectors (FPWV * addr)
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{
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#define PD_FINTEL_WSMS_READY_MASK 0x0080
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*addr = (FPW) 0x00500050; /* clear status register */
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/* this sends the clear lock bit command */
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*addr = (FPW) 0x00600060;
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*addr = (FPW) 0x00D000D0;
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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int prot, sect;
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ulong type, start, last;
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int rcode = 0;
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#ifdef CONFIG_USE_IRQ
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int iflag;
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#endif
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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type = (info->flash_id & FLASH_VENDMASK);
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if ((type != FLASH_MAN_INTEL)) {
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printf ("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf ("\n");
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}
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start = get_timer (0);
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last = start;
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#ifdef CONFIG_USE_IRQ
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/* Disable interrupts which might cause a timeout here */
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iflag = disable_interrupts ();
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#endif
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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FPWV *addr = (FPWV *) (info->start[sect]);
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FPW status;
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printf ("Erasing sector %2d ... ", sect);
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flash_unprotect_sectors (addr);
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/* arm simple, non interrupt dependent timer */
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reset_timer_masked ();
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*addr = (FPW) 0x00500050;/* clear status register */
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*addr = (FPW) 0x00200020;/* erase setup */
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*addr = (FPW) 0x00D000D0;/* erase confirm */
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while (((status =
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*addr) & (FPW) 0x00800080) !=
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(FPW) 0x00800080) {
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if (get_timer_masked () >
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CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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/* suspend erase */
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*addr = (FPW) 0x00B000B0;
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/* reset to read mode */
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*addr = (FPW) 0x00FF00FF;
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rcode = 1;
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break;
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}
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}
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/* clear status register cmd. */
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*addr = (FPW) 0x00500050;
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*addr = (FPW) 0x00FF00FF;/* resest to read mode */
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printf (" done\n");
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}
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}
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#ifdef CONFIG_USE_IRQ
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if (iflag)
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enable_interrupts();
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#endif
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return rcode;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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* 4 - Flash not identified
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*/
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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{
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ulong cp, wp;
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FPW data;
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int count, i, l, rc, port_width;
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if (info->flash_id == FLASH_UNKNOWN) {
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return 4;
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}
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/* get lower word aligned address */
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#ifdef FLASH_PORT_WIDTH16
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wp = (addr & ~1);
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port_width = 2;
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#else
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wp = (addr & ~3);
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port_width = 4;
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#endif
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/*
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* handle unaligned start bytes
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*/
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if ((l = addr - wp) != 0) {
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data = 0;
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for (i = 0, cp = wp; i < l; ++i, ++cp) {
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data = (data << 8) | (*(uchar *) cp);
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}
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for (; i < port_width && cnt > 0; ++i) {
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data = (data << 8) | *src++;
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--cnt;
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++cp;
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}
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for (; cnt == 0 && i < port_width; ++i, ++cp) {
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data = (data << 8) | (*(uchar *) cp);
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}
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if ((rc = write_data (info, wp, SWAP (data))) != 0) {
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return(rc);
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}
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wp += port_width;
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}
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/*
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* handle word aligned part
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*/
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count = 0;
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while (cnt >= port_width) {
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data = 0;
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for (i = 0; i < port_width; ++i) {
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data = (data << 8) | *src++;
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}
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if ((rc = write_data (info, wp, SWAP (data))) != 0) {
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return(rc);
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}
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wp += port_width;
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cnt -= port_width;
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if (count++ > 0x800) {
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spin_wheel ();
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count = 0;
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}
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}
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if (cnt == 0) {
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return(0);
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}
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/*
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* handle unaligned tail bytes
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*/
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data = 0;
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for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
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data = (data << 8) | *src++;
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--cnt;
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}
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for (; i < port_width; ++i, ++cp) {
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data = (data << 8) | (*(uchar *) cp);
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}
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return(write_data (info, wp, SWAP (data)));
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}
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/*-----------------------------------------------------------------------
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* Write a word or halfword to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_data (flash_info_t * info, ulong dest, FPW data)
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{
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FPWV *addr = (FPWV *) dest;
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ulong status;
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#ifdef CONFIG_USE_IRQ
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int iflag;
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#endif
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/* Check if Flash is (sufficiently) erased */
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if ((*addr & data) != data) {
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printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
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return(2);
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}
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/* Disable interrupts which might cause a timeout here */
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#ifdef CONFIG_USE_IRQ
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iflag = disable_interrupts ();
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#endif
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*addr = (FPW) 0x00400040; /* write setup */
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*addr = data;
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/* arm simple, non interrupt dependent timer */
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reset_timer_masked ();
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/* wait while polling the status register */
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while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
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if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
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*addr = (FPW) 0x00FF00FF; /* restore read mode */
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return(1);
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}
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}
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*addr = (FPW) 0x00FF00FF; /* restore read mode */
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#ifdef CONFIG_USE_IRQ
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if (iflag)
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enable_interrupts();
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#endif
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return(0);
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}
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void inline spin_wheel (void)
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{
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static int p = 0;
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static char w[] = "\\/-";
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printf ("\010%c", w[p]);
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(++p == 3) ? (p = 0) : 0;
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}
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