0db5bca807
- Add port to MPC555/556 microcontrollers
- Add support for cmi customer board with
Intel 28F128J3A, 28F320J3A or 28F640J3A flash.
* Patch by Rick Bronson, 28 Mar 2003:
- fix common/cmd_nand.c
156 lines
3.7 KiB
C
156 lines
3.7 KiB
C
/*
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* (C) Copyright 2003
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* Martin Winistoerfer, martinwinistoerfer@gmx.ch.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation,
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*/
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/*
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* File: cpu.c
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*
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* Discription: Some cpu specific function for watchdog,
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* cpu version test, clock setting ...
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*
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <mpc5xx.h>
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#if (defined(CONFIG_MPC555))
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# define ID_STR "MPC555/556"
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/*
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* Check version of cpu with Processor Version Register (PVR)
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*/
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static int check_cpu_version (long clock, uint pvr, uint immr)
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{
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char buf[32];
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/* The highest 16 bits should be 0x0002 for a MPC555/556 */
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if ((pvr >> 16) == 0x0002) {
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printf (" " ID_STR " Version %x", (pvr >> 16));
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printf (" at %s MHz:", strmhz (buf, clock));
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} else {
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printf ("Not supported cpu version");
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return -1;
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}
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return 0;
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}
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#endif /* CONFIG_MPC555 */
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/*
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* Check version of mpc5xx
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*/
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int checkcpu (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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ulong clock = gd->cpu_clk;
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uint immr = get_immr (0); /* Return full IMMR contents */
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uint pvr = get_pvr (); /* Retrieve PVR register */
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puts ("CPU: ");
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return check_cpu_version (clock, pvr, immr);
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}
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/*
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* Called by macro WATCHDOG_RESET
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*/
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#if defined(CONFIG_WATCHDOG)
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void watchdog_reset (void)
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{
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int re_enable = disable_interrupts ();
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reset_5xx_watchdog ((immap_t *) CFG_IMMR);
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if (re_enable)
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enable_interrupts ();
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}
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/*
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* Will clear software reset
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*/
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void reset_5xx_watchdog (volatile immap_t * immr)
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{
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/* Use the MPC5xx Internal Watchdog */
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immr->im_siu_conf.sc_swsr = 0x556c; /* Prevent SW time-out */
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immr->im_siu_conf.sc_swsr = 0xaa39;
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}
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#endif /* CONFIG_WATCHDOG */
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/*
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* Get timebase clock frequency
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*/
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unsigned long get_tbclk (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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volatile immap_t *immr = (volatile immap_t *) CFG_IMMR;
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ulong oscclk, factor;
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if (immr->im_clkrst.car_sccr & SCCR_TBS) {
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return (gd->cpu_clk / 16);
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}
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factor = (((CFG_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1;
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oscclk = gd->cpu_clk / factor;
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if ((immr->im_clkrst.car_sccr & SCCR_RTSEL) == 0 || factor > 2) {
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return (oscclk / 4);
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}
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return (oscclk / 16);
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}
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/*
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* Reset board
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*/
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int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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{
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ulong addr;
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/* Interrupts off, enable reset */
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__asm__ volatile (" mtspr 81, %r0 \n\t
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mfmsr %r3 \n\t
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rlwinm %r31,%r3,0,25,23\n\t
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mtmsr %r31 \n\t");
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/*
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* Trying to execute the next instruction at a non-existing address
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* should cause a machine check, resulting in reset
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*/
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#ifdef CFG_RESET_ADDRESS
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addr = CFG_RESET_ADDRESS;
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#else
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/*
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* note: when CFG_MONITOR_BASE points to a RAM address, CFG_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address
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* known to be invalid on your system and assign it to CFG_RESET_ADDRESS.
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* "(ulong)-1" used to be a good choice for many systems...
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*/
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addr = CFG_MONITOR_BASE - sizeof (ulong);
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#endif
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((void (*) (void)) addr) ();
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return 1;
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}
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