9bbc13e790
The introduction of the puma-specific generator was mainly a way
to split the pmu firmware from the ATF binary and not having to
distribute that 4GB (sparse) image that was created before moving
to the bl31.elf as base.
Looking at the publically available repository for that separate
pmu firmware
https://git.theobroma-systems.com/rk3399-cortex-m0.git/
there is also no activity for 3 years and apart from some build
customizations no other changes were done.
And even then, if changes need to be made, this can very well also
happen in the atf context itself, so there is no real need to
diverge from the established build procedure and we can just go
back to using the main make_fit_atf.py script.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
92 lines
2.3 KiB
Plaintext
92 lines
2.3 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
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CONFIG_TARGET_PUMA_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_DEBUG_UART_BASE=0xFF180000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL_TEXT_BASE=0xff8c2000
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CONFIG_DEBUG_UART=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
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CONFIG_MISC_INIT_R=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_POWER_SUPPORT=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_BMP=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_LIVE=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou"
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MISC=y
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CONFIG_ROCKCHIP_EFUSE=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_SPI_FLASH_GIGADEVICE=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_DM_PMIC_FAN53555=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_SPL_DM_REGULATOR=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_DM_RTC=y
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CONFIG_RTC_ISL1208=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_ROCKCHIP_SPI=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_ASIX88179=y
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CONFIG_USB_ETHER_MCS7830=y
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CONFIG_USB_ETHER_RTL8152=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_DM_VIDEO=y
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# CONFIG_VIDEO_BPP8 is not set
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CONFIG_DISPLAY=y
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CONFIG_VIDEO_ROCKCHIP=y
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CONFIG_DISPLAY_ROCKCHIP_HDMI=y
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CONFIG_ERRNO_STR=y
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