9973e3c614
This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* (C) Copyright 2000-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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long int spd_sdram(void);
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int board_early_init_f(void)
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{
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr(uicer, 0x00000000); /* disable all ints */
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mtdcr(uiccr, 0x00000010);
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mtdcr(uicpr, 0xFFFF7FF0); /* set int polarities */
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mtdcr(uictr, 0x00000010); /* set int trigger levels */
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mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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/*
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* Configure CPC0_PCI to enable PerWE as output
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* and enable the internal PCI arbiter if selected
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*/
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if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB)
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mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
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else
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mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN);
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return 0;
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}
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/*
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* Check Board Identity:
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*/
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int checkboard(void)
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{
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char *s = getenv("serial#");
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puts("Board: Bubinga - AMCC PPC405EP Evaluation Board");
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if (s != NULL) {
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puts(", serial# ");
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puts(s);
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}
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putc('\n');
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return (0);
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}
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/* -------------------------------------------------------------------------
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initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
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the necessary info for SDRAM controller configuration
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------------------------------------------------------------------------- */
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phys_size_t initdram(int board_type)
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{
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long int ret;
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ret = spd_sdram();
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return ret;
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}
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