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95336738f1
u-boot/arch/arc/lib
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Eugeniy Paltsev 95336738f1 ARC: Cache: Fix SLC operations when SLC is bypassed for data 
If L1 D$ is disabled SLC is bypassed for data and all
load/store requests are sent directly to main memory.

If L1 I$ is disabled SLC is NOT bypassed for instructions
and all instruction requests are fetched through SLC.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-21 17:06:54 +03:00
..
_millicodethunk.S arc: build libgcc in U-Boot 2015-02-09 16:41:20 +03:00
bootm.c fdt: Implement weak arch_fixup_fdt() 2018-02-18 12:53:38 -07:00
cache.c ARC: Cache: Fix SLC operations when SLC is bypassed for data 2018-03-21 17:06:54 +03:00
cpu.c board_f: Rename initdram() to dram_init() 2017-04-13 09:40:57 -04:00
init_helpers.c arc: significant cache rework 2015-07-01 17:17:27 +03:00
interrupts.c arc: Update exception & interrupt handling for ARCv2 2016-08-05 12:50:25 +03:00
ints_low.S arc: Update exception & interrupt handling for ARCv2 2016-08-05 12:50:25 +03:00
libgcc2.c arc: build libgcc in U-Boot 2015-02-09 16:41:20 +03:00
libgcc2.h arc: build libgcc in U-Boot 2015-02-09 16:41:20 +03:00
Makefile arc: Get rid of handwritten string routines 2018-03-21 16:21:34 +03:00
relocate.c arc: Introduce a possibility to not relocate U-boot 2018-03-21 16:21:34 +03:00
reset.c arc: move common sources in library 2015-01-15 22:40:49 +03:00
start.S arc: Introduce a possibility to not relocate U-boot 2018-03-21 16:21:34 +03:00