41575d8e4c
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
336 lines
7.0 KiB
C
336 lines
7.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 Google LLC
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*/
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#define LOG_CATEGORY UCLASS_SOUND
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#include <common.h>
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#include <audio_codec.h>
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#include <dm.h>
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#include <i2c.h>
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#include "rt5677.h"
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#include <log.h>
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struct rt5677_priv {
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struct udevice *dev;
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};
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/* RT5677 has 256 8-bit register addresses, and 16-bit register data */
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struct rt5677_init_reg {
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u8 reg;
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u16 val;
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};
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static struct rt5677_init_reg init_list[] = {
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{RT5677_LOUT1, 0x0800},
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{RT5677_SIDETONE_CTRL, 0x0000},
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{RT5677_STO1_ADC_DIG_VOL, 0x3F3F},
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{RT5677_DAC1_DIG_VOL, 0x9090},
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{RT5677_STO2_ADC_MIXER, 0xA441},
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{RT5677_STO1_ADC_MIXER, 0x5480},
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{RT5677_STO1_DAC_MIXER, 0x8A8A},
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{RT5677_PWR_DIG1, 0x9800}, /* Power up I2S1 */
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{RT5677_PWR_ANLG1, 0xE9D5},
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{RT5677_PWR_ANLG2, 0x2CC0},
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{RT5677_PWR_DSP2, 0x0C00},
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{RT5677_I2S2_SDP, 0x0000},
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{RT5677_CLK_TREE_CTRL1, 0x1111},
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{RT5677_PLL1_CTRL1, 0x0000},
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{RT5677_PLL1_CTRL2, 0x0000},
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{RT5677_DIG_MISC, 0x0029},
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{RT5677_GEN_CTRL1, 0x00FF},
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{RT5677_GPIO_CTRL2, 0x0020},
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{RT5677_PWR_DIG2, 0x9024}, /* Power on ADC Stereo Filters */
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{RT5677_PDM_OUT_CTRL, 0x0088}, /* Unmute PDM, set stereo1 DAC */
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{RT5677_PDM_DATA_CTRL1, 0x0001}, /* Sysclk to PDM filter divider 2 */
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};
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/**
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* rt5677_i2c_read() - Read a 16-bit register
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*
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* @priv: Private driver data
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* @reg: Register number to read
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* @returns data read or -ve on error
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*/
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static int rt5677_i2c_read(struct rt5677_priv *priv, uint reg)
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{
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u8 buf[2];
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int ret;
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ret = dm_i2c_read(priv->dev, reg, buf, sizeof(u16));
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if (ret)
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return ret;
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return buf[0] << 8 | buf[1];
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}
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/**
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* rt5677_i2c_write() - Write a 16-bit register
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*
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* @priv: Private driver data
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* @reg: Register number to read
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* @data: Data to write
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* @returns 0 if OK, -ve on error
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*/
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static int rt5677_i2c_write(struct rt5677_priv *priv, uint reg, uint data)
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{
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u8 buf[2];
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buf[0] = (data >> 8) & 0xff;
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buf[1] = data & 0xff;
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return dm_i2c_write(priv->dev, reg, buf, sizeof(u16));
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}
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/**
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* rt5677_bic_or() - Set and clear bits of a codec register
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*
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* @priv: Private driver data
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* @reg: Register number to update
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* @bic: Mask of bits to clear
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* @set: Mask of bits to set
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* @returns 0 if OK, -ve on error
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*
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*/
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static int rt5677_bic_or(struct rt5677_priv *priv, uint reg, uint bic,
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uint set)
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{
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uint old, new_value;
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int ret;
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old = rt5677_i2c_read(priv, reg);
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if (old < 0)
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return old;
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new_value = (old & ~bic) | (set & bic);
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if (old != new_value) {
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ret = rt5677_i2c_write(priv, reg, new_value);
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if (ret)
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return ret;
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}
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return 0;
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}
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/**
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* rt5677_reg_init() - Initialise codec regs w/static/base values
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*
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* @priv: Private driver data
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* @returns 0 if OK, -ve on error
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*/
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static int rt5677_reg_init(struct rt5677_priv *priv)
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{
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int ret;
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int i;
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for (i = 0; i < ARRAY_SIZE(init_list); i++) {
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ret = rt5677_i2c_write(priv, init_list[i].reg, init_list[i].val);
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if (ret)
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return ret;
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}
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return 0;
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}
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#ifdef DEBUG
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static void debug_dump_5677_regs(struct rt5677_priv *priv, int swap)
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{
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uint i, reg_word;
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/* Show all 16-bit codec regs */
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for (i = 0; i < RT5677_REG_CNT; i++) {
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if (i % 8 == 0)
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log_debug("\nMX%02x: ", i);
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rt5677_i2c_read(priv, (u8)i, ®_word);
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if (swap)
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log_debug("%04x ", swap_bytes16(reg_word));
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else
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log_debug("%04x ", reg_word);
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}
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log_debug("\n");
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/* Show all 16-bit 'private' codec regs */
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for (i = 0; i < RT5677_PR_REG_CNT; i++) {
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if (i % 8 == 0)
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log_debug("\nPR%02x: ", i);
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rt5677_i2c_write(priv, RT5677_PRIV_INDEX, i);
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rt5677_i2c_read(priv, RT5677_PRIV_DATA, ®_word);
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if (swap)
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log_debug("%04x ", swap_bytes16(reg_word));
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else
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log_debug("%04x ", reg_word);
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}
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log_debug("\n");
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}
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#endif /* DEBUG */
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static int rt5677_hw_params(struct rt5677_priv *priv, uint bits_per_sample)
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{
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int ret;
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switch (bits_per_sample) {
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case 16:
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ret = rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_DL_MASK,
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0);
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if (ret) {
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log_debug("Error updating I2S1 Interface Ctrl reg\n");
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return 1;
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}
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break;
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default:
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log_err("Illegal bits per sample %d\n", bits_per_sample);
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return -EINVAL;
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}
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return 0;
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}
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/**
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* rt5677_set_fmt() - set rt5677 I2S format
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*
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* @priv: Private driver data
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* @returns 0 if OK, -ve on error
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*/
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static int rt5677_set_fmt(struct rt5677_priv *priv)
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{
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int ret = 0;
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/*
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* Set format here: Assumes I2S, NB_NF, CBS_CFS
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*
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* CBS_CFS (Codec Bit Slave/Codec Frame Slave)
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*/
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ret = rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_MS_MASK,
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RT5677_I2S_MS_S);
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/* NB_NF (Normal Bit/Normal Frame) */
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ret |= rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_BP_MASK,
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RT5677_I2S_BP_NOR);
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/* I2S mode */
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ret |= rt5677_bic_or(priv, RT5677_I2S1_SDP, RT5677_I2S_DF_MASK,
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RT5677_I2S_DF_I2S);
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/* A44: I2S2 (going to speaker amp) is master */
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ret |= rt5677_bic_or(priv, RT5677_I2S2_SDP, RT5677_I2S_MS_MASK,
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RT5677_I2S_MS_M);
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if (ret) {
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log_err("Error updating I2S1 Interface Ctrl reg\n");
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return ret;
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}
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return 0;
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}
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/**
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* rt5677_reset() - reset the audio codec
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*
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* @priv: Private driver data
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* @returns 0 if OK, -ve on error
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*/
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static int rt5677_reset(struct rt5677_priv *priv)
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{
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int ret;
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/* Reset the codec registers to their defaults */
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ret = rt5677_i2c_write(priv, RT5677_RESET, RT5677_SW_RESET);
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if (ret) {
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log_err("Error resetting codec\n");
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return ret;
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}
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return 0;
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}
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/**
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* Initialise rt5677 codec device
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*
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* @priv: Private driver data
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* @returns 0 if OK, -ve on error
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*/
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int rt5677_device_init(struct rt5677_priv *priv)
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{
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int ret;
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/* Read status reg */
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ret = rt5677_i2c_read(priv, RT5677_RESET);
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if (ret < 0)
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return ret;
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log_debug("reg 00h, Software Reset & Status = 0x%04x\n", ret);
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/* Reset the codec/regs */
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ret = rt5677_reset(priv);
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if (ret)
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return ret;
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ret = rt5677_i2c_read(priv, RT5677_VENDOR_ID1);
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if (ret < 0) {
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log_err("Error reading vendor ID\n");
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return 1;
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}
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log_debug("Hardware ID: %0xX\n", ret);
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ret = rt5677_i2c_read(priv, RT5677_VENDOR_ID2);
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if (ret < 0) {
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log_err("Error reading vendor rev\n");
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return 1;
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}
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log_debug("Hardware revision: %04x\n", ret);
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return 0;
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}
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static int rt5677_set_params(struct udevice *dev, int interface, int rate,
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int mclk_freq, int bits_per_sample,
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uint channels)
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{
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struct rt5677_priv *priv = dev_get_priv(dev);
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int ret;
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/* Initialise codec regs w/static/base values, same as Linux driver */
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ret = rt5677_reg_init(priv);
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if (ret)
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return ret;
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ret = rt5677_hw_params(priv, bits_per_sample);
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if (ret)
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return ret;
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ret = rt5677_set_fmt(priv);
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if (ret)
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return ret;
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return 0;
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}
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static int rt5677_probe(struct udevice *dev)
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{
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struct rt5677_priv *priv = dev_get_priv(dev);
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priv->dev = dev;
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return rt5677_device_init(priv);
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}
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static const struct audio_codec_ops rt5677_ops = {
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.set_params = rt5677_set_params,
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};
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static const struct udevice_id rt5677_ids[] = {
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{ .compatible = "realtek,rt5677" },
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{ }
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};
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U_BOOT_DRIVER(rt5677_drv) = {
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.name = "rt5677",
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.id = UCLASS_AUDIO_CODEC,
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.of_match = rt5677_ids,
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.ops = &rt5677_ops,
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.probe = rt5677_probe,
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.priv_auto = sizeof(struct rt5677_priv),
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};
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