u-boot/arch
Pali Rohár 8b3d7ecdfe arm: mvebu: Add support for reading LD0 and LD1 eFuse
Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse
is used for secure boot and each line is 64 bits long + 1 lock bit. LD
eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for
Marvell Internal Use and LD 1 line is for General Purpose Data. U-Boot
already contains HD eFuse reading and programming support.

This patch implements LD eFuse reading support. LD 0 line is mapped to
U-Boot fuse bank 64 and LD 1 line to fuse bank 65.

LD 0 Marvell Internal Use line seems that was burned in factory with some
data and can be read by U-Boot fuse command:

  => fuse read 64 0 9

LD 1 General Purpose Data line is by default empty and can be read by
U-Boot fuse command:

  => fuse read 65 0 9

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-04-21 12:31:36 +02:00
..
arc dts: automatically build necessary .dtb files 2022-02-09 12:26:12 -07:00
arm arm: mvebu: Add support for reading LD0 and LD1 eFuse 2022-04-21 12:31:36 +02:00
m68k Convert CONFIG_MCFRTC et al to Kconfig 2022-04-01 10:28:46 -04:00
microblaze microblaze: Migrate DCACHE/ICACHE to Kconfig 2022-04-08 10:46:22 -04:00
mips event: Convert arch_cpu_init_dm() to use events 2022-03-10 08:28:36 -05:00
nds32 nds32: Migrate CONFIG_DEBUG_LED to Kconfig 2022-04-08 10:46:22 -04:00
nios2 event: Convert arch_cpu_init_dm() to use events 2022-03-10 08:28:36 -05:00
powerpc PPC: Enable Job ring driver model. 2022-04-12 11:20:30 +02:00
riscv riscv: alloc space exhausted 2022-04-06 10:58:13 +08:00
sandbox sandbox: Align linker lists to a 32-byte boundary 2022-04-18 17:53:56 -04:00
sh Split CONFIG_CC_OPTIMIZE_FOR_SIZE into two configs 2022-03-25 13:35:50 -04:00
x86 Remove duplication of table_compute_checksum function 2022-04-14 15:39:15 -04:00
xtensa Convert CONFIG_BOARD_POSTCLK_INIT to Kconfig 2022-03-03 16:51:19 -05:00
.gitignore
Kconfig Merge branch 'next' 2022-04-04 10:48:44 -04:00
u-boot-elf.lds