ec48b6c991
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
92 lines
2.1 KiB
C
92 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration for Xilinx Versal
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* (C) Copyright 2016 - 2018 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*
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* Based on Configuration for Xilinx ZynqMP
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*/
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#ifndef __XILINX_VERSAL_H
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#define __XILINX_VERSAL_H
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#define CONFIG_REMAKE_ELF
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/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
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/* Generic Interrupt Controller Definitions */
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#define GICD_BASE 0xF9000000
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#define GICR_BASE 0xF9080000
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#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
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#define CONFIG_SYS_MEMTEST_START 0
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#define CONFIG_SYS_MEMTEST_END 1000
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
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/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
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#if CONFIG_COUNTER_FREQUENCY
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# define COUNTER_FREQUENCY CONFIG_COUNTER_FREQUENCY
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#endif
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/* Serial setup */
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#define CONFIG_ARM_DCC
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#define CONFIG_CPU_ARMV8
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{ 4800, 9600, 19200, 38400, 57600, 115200 }
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/* BOOTP options */
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_MAY_FAIL
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#define CONFIG_IP_DEFRAG
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#define CONFIG_TFTP_BLOCKSIZE 4096
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR 0x8000000
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/* Monitor Command Prompt */
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/* Console I/O Buffer Size */
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#define CONFIG_SYS_CBSIZE 2048
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MAXARGS 64
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/* Ethernet driver */
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#if defined(CONFIG_ZYNQ_GEM)
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# define CONFIG_NET_MULTI
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# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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# define PHY_ANEG_TIMEOUT 20000
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#endif
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#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
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#define CONFIG_CLOCKS
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#define ENV_MEM_LAYOUT_SETTINGS \
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"fdt_high=10000000\0" \
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"initrd_high=10000000\0" \
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"fdt_addr_r=0x40000000\0" \
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"pxefile_addr_r=0x10000000\0" \
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"kernel_addr_r=0x18000000\0" \
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"scriptaddr=0x02000000\0" \
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"ramdisk_addr_r=0x02100000\0"
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#define BOOT_TARGET_DEVICES(func) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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/* Initial environment variables */
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#ifndef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_MEM_LAYOUT_SETTINGS \
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BOOTENV
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#endif
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#endif /* __XILINX_VERSAL_H */
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