2f8a6db5d8
In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <trini@konsulko.com>
89 lines
1.9 KiB
C
89 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* Author: Chunhe Lan <Chunhe.Lan@freescale.com>
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <console.h>
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#include <env_internal.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/spl.h>
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#include <malloc.h>
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#include <ns16550.h>
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#include <nand.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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#include <i2c.h>
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#include "t4rdb.h"
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#define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000
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DECLARE_GLOBAL_DATA_PTR;
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phys_size_t get_effective_memsize(void)
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{
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return CONFIG_SYS_L3_SIZE;
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}
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void board_init_f(ulong bootflag)
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{
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u32 plat_ratio, sys_clk, ccb_clk;
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
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/* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
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memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
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/* Update GD pointer */
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gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
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/* compiler optimization barrier needed for GCC >= 3.4 */
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__asm__ __volatile__("" : : : "memory");
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console_init_f();
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/* initialize selected port with appropriate baud rate */
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sys_clk = get_board_sys_clk();
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plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
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ccb_clk = sys_clk * plat_ratio / 2;
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ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
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ccb_clk / 16 / CONFIG_BAUDRATE);
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puts("\nSD boot...\n");
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relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
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}
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void board_init_r(gd_t *gd, ulong dest_addr)
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{
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struct bd_info *bd;
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bd = (struct bd_info *)(gd + sizeof(gd_t));
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memset(bd, 0, sizeof(struct bd_info));
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gd->bd = bd;
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arch_cpu_init();
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get_clocks();
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mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
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CONFIG_SPL_RELOC_MALLOC_SIZE);
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gd->flags |= GD_FLG_FULL_MALLOC_INIT;
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mmc_initialize(bd);
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mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
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(uchar *)SPL_ENV_ADDR);
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gd->env_addr = (ulong)(SPL_ENV_ADDR);
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gd->env_valid = ENV_VALID;
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i2c_init_all();
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dram_init();
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mmc_boot();
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}
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