6e780c7a7b
Since Rockchip requires 32-bit serial access, add this to the driver. Refactor a little to make this easier. Signed-off-by: Simon Glass <sjg@chromium.org>
416 lines
11 KiB
C
416 lines
11 KiB
C
/*
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* COM1 NS16550 support
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* originally from linux source (arch/powerpc/boot/ns16550.c)
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* modified to use CONFIG_SYS_ISA_MEM and new defines
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <mapmem.h>
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#include <ns16550.h>
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#include <serial.h>
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#include <watchdog.h>
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#include <linux/types.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
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#define UART_MCRVAL (UART_MCR_DTR | \
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UART_MCR_RTS) /* RTS/DTR */
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#define UART_FCRVAL (UART_FCR_FIFO_EN | \
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UART_FCR_RXSR | \
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UART_FCR_TXSR) /* Clear & enable FIFOs */
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#ifndef CONFIG_DM_SERIAL
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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#define serial_out(x, y) outb(x, (ulong)y)
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#define serial_in(y) inb((ulong)y)
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#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
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#define serial_out(x, y) out_be32(y, x)
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#define serial_in(y) in_be32(y)
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#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
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#define serial_out(x, y) out_le32(y, x)
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#define serial_in(y) in_le32(y)
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#else
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#define serial_out(x, y) writeb(x, y)
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#define serial_in(y) readb(y)
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#endif
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#endif /* !CONFIG_DM_SERIAL */
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#if defined(CONFIG_SOC_KEYSTONE)
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#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
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#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
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#undef UART_MCRVAL
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#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
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#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
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#else
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#define UART_MCRVAL (UART_MCR_RTS)
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#endif
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#endif
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#ifndef CONFIG_SYS_NS16550_IER
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#define CONFIG_SYS_NS16550_IER 0x00
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#endif /* CONFIG_SYS_NS16550_IER */
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#ifdef CONFIG_DM_SERIAL
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static inline void serial_out_shift(void *addr, int shift, int value)
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{
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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outb(value, (ulong)addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
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out_le32(addr, value);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
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out_be32(addr, value);
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#elif defined(CONFIG_SYS_NS16550_MEM32)
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writel(value, addr);
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#elif defined(CONFIG_SYS_BIG_ENDIAN)
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writeb(value, addr + (1 << shift) - 1);
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#else
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writeb(value, addr);
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#endif
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}
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static inline int serial_in_shift(void *addr, int shift)
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{
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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return inb((ulong)addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
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return in_le32(addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
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return in_be32(addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32)
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return readl(addr);
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#elif defined(CONFIG_SYS_BIG_ENDIAN)
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return readb(addr + (1 << shift) - 1);
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#else
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return readb(addr);
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#endif
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}
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static void ns16550_writeb(NS16550_t port, int offset, int value)
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{
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struct ns16550_platdata *plat = port->plat;
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unsigned char *addr;
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offset *= 1 << plat->reg_shift;
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addr = map_sysmem(plat->base, 0) + offset;
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/*
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* As far as we know it doesn't make sense to support selection of
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* these options at run-time, so use the existing CONFIG options.
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*/
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serial_out_shift(addr, plat->reg_shift, value);
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}
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static int ns16550_readb(NS16550_t port, int offset)
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{
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struct ns16550_platdata *plat = port->plat;
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unsigned char *addr;
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offset *= 1 << plat->reg_shift;
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addr = map_sysmem(plat->base, 0) + offset;
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return serial_in_shift(addr, plat->reg_shift);
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}
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/* We can clean these up once everything is moved to driver model */
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#define serial_out(value, addr) \
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ns16550_writeb(com_port, \
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(unsigned char *)addr - (unsigned char *)com_port, value)
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#define serial_in(addr) \
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ns16550_readb(com_port, \
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(unsigned char *)addr - (unsigned char *)com_port)
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#endif
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static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
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{
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const unsigned int mode_x_div = 16;
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return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
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}
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int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
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{
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#ifdef CONFIG_OMAP1510
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/* If can't cleanly clock 115200 set div to 1 */
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if ((clock == 12000000) && (baudrate == 115200)) {
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port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
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return 1; /* return 1 for base divisor */
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}
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port->osc_12m_sel = 0; /* clear if previsouly set */
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#endif
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return calc_divisor(port, clock, baudrate);
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}
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static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
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{
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serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
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serial_out(baud_divisor & 0xff, &com_port->dll);
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serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
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serial_out(UART_LCRVAL, &com_port->lcr);
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}
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void NS16550_init(NS16550_t com_port, int baud_divisor)
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{
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#if (defined(CONFIG_SPL_BUILD) && \
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(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
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/*
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* On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
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* before SPL starts only THRE bit is set. We have to empty the
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* transmitter before initialization starts.
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*/
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if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
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== UART_LSR_THRE) {
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if (baud_divisor != -1)
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NS16550_setbrg(com_port, baud_divisor);
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serial_out(0, &com_port->mdr1);
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}
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#endif
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while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
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;
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serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
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#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
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defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
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serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
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#endif
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serial_out(UART_MCRVAL, &com_port->mcr);
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serial_out(UART_FCRVAL, &com_port->fcr);
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if (baud_divisor != -1)
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NS16550_setbrg(com_port, baud_divisor);
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#if defined(CONFIG_OMAP) || \
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defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
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defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
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/* /16 is proper to hit 115200 with 48MHz */
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serial_out(0, &com_port->mdr1);
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#endif /* CONFIG_OMAP */
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#if defined(CONFIG_SOC_KEYSTONE)
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serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
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#endif
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}
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#ifndef CONFIG_NS16550_MIN_FUNCTIONS
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void NS16550_reinit(NS16550_t com_port, int baud_divisor)
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{
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serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
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NS16550_setbrg(com_port, 0);
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serial_out(UART_MCRVAL, &com_port->mcr);
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serial_out(UART_FCRVAL, &com_port->fcr);
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NS16550_setbrg(com_port, baud_divisor);
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}
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#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
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void NS16550_putc(NS16550_t com_port, char c)
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{
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while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
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;
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serial_out(c, &com_port->thr);
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/*
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* Call watchdog_reset() upon newline. This is done here in putc
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* since the environment code uses a single puts() to print the complete
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* environment upon "printenv". So we can't put this watchdog call
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* in puts().
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*/
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if (c == '\n')
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WATCHDOG_RESET();
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}
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#ifndef CONFIG_NS16550_MIN_FUNCTIONS
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char NS16550_getc(NS16550_t com_port)
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{
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while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
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extern void usbtty_poll(void);
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usbtty_poll();
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#endif
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WATCHDOG_RESET();
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}
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return serial_in(&com_port->rbr);
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}
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int NS16550_tstc(NS16550_t com_port)
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{
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return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
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}
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#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
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#ifdef CONFIG_DEBUG_UART_NS16550
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#include <debug_uart.h>
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#define serial_dout(reg, value) \
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serial_out_shift((char *)com_port + \
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((char *)reg - (char *)com_port) * \
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(1 << CONFIG_DEBUG_UART_SHIFT), \
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CONFIG_DEBUG_UART_SHIFT, value)
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#define serial_din(reg) \
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serial_in_shift((char *)com_port + \
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((char *)reg - (char *)com_port) * \
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(1 << CONFIG_DEBUG_UART_SHIFT), \
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CONFIG_DEBUG_UART_SHIFT)
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void debug_uart_init(void)
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{
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struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
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int baud_divisor;
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/*
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* We copy the code from above because it is already horribly messy.
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* Trying to refactor to nicely remove the duplication doesn't seem
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* feasible. The better fix is to move all users of this driver to
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* driver model.
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*/
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baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
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CONFIG_BAUDRATE);
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serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
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serial_dout(&com_port->mcr, UART_MCRVAL);
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serial_dout(&com_port->fcr, UART_FCRVAL);
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serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
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serial_dout(&com_port->dll, baud_divisor & 0xff);
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serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
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serial_dout(&com_port->lcr, UART_LCRVAL);
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}
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static inline void _debug_uart_putc(int ch)
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{
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struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
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while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
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;
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serial_dout(&com_port->thr, ch);
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}
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DEBUG_UART_FUNCS
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#endif
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#ifdef CONFIG_DM_SERIAL
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static int ns16550_serial_putc(struct udevice *dev, const char ch)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
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return -EAGAIN;
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serial_out(ch, &com_port->thr);
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/*
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* Call watchdog_reset() upon newline. This is done here in putc
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* since the environment code uses a single puts() to print the complete
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* environment upon "printenv". So we can't put this watchdog call
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* in puts().
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*/
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if (ch == '\n')
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WATCHDOG_RESET();
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return 0;
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}
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static int ns16550_serial_pending(struct udevice *dev, bool input)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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if (input)
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return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
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else
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return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
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}
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static int ns16550_serial_getc(struct udevice *dev)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
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return -EAGAIN;
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return serial_in(&com_port->rbr);
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}
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static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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struct ns16550_platdata *plat = com_port->plat;
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int clock_divisor;
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clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
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NS16550_setbrg(com_port, clock_divisor);
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return 0;
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}
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int ns16550_serial_probe(struct udevice *dev)
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{
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struct NS16550 *const com_port = dev_get_priv(dev);
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com_port->plat = dev_get_platdata(dev);
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NS16550_init(com_port, -1);
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return 0;
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}
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#ifdef CONFIG_OF_CONTROL
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int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct ns16550_platdata *plat = dev->platdata;
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fdt_addr_t addr;
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/* try Processor Local Bus device first */
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addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
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#ifdef CONFIG_PCI
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if (addr == FDT_ADDR_T_NONE) {
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/* then try pci device */
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struct fdt_pci_addr pci_addr;
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u32 bar;
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int ret;
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/* we prefer to use a memory-mapped register */
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ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
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FDT_PCI_SPACE_MEM32, "reg",
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&pci_addr);
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if (ret) {
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/* try if there is any i/o-mapped register */
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ret = fdtdec_get_pci_addr(gd->fdt_blob,
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dev->of_offset,
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FDT_PCI_SPACE_IO,
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"reg", &pci_addr);
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if (ret)
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return ret;
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}
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ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
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&pci_addr, &bar);
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if (ret)
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return ret;
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addr = bar;
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}
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#endif
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->base = addr;
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plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"reg-shift", 1);
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return 0;
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}
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#endif
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const struct dm_serial_ops ns16550_serial_ops = {
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.putc = ns16550_serial_putc,
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.pending = ns16550_serial_pending,
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.getc = ns16550_serial_getc,
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.setbrg = ns16550_serial_setbrg,
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};
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#endif /* CONFIG_DM_SERIAL */
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