6bdda4b200
With a 8GiB memory board, it seems that the "very unlikely event" of a DDR initialization with non-optimal values are not really that unlikely. It happens in about every other reboot. As described in erratum A-009942, preset the DEBUG_28 register with an optimal value. The value iself depends on the memory configuration of the board, but the used value seems to work well for all variants. Signed-off-by: Michael Walle <michael@walle.cc> |
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| pitx_imx8m | ||
| sl28 | ||
| sl-mx6ul | ||
| sl-mx8mm | ||