d13f5b254a
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general. This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
58 lines
2.1 KiB
Makefile
58 lines
2.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2000-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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# There are many options which enable SPI, so make this library available
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ifdef CONFIG_DM_SPI
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obj-y += spi-uclass.o
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obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
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obj-$(CONFIG_SOFT_SPI) += soft_spi.o
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obj-$(CONFIG_SPI_MEM) += spi-mem.o
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else
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obj-y += spi.o
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obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
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endif
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obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
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obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
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obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
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obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o
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obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
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obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
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obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
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obj-$(CONFIG_CF_SPI) += cf_spi.o
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obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
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obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o
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obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
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obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
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obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
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obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o
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obj-$(CONFIG_ICH_SPI) += ich.o
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obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
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obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
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obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
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obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
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obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o
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obj-$(CONFIG_MXC_SPI) += mxc_spi.o
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obj-$(CONFIG_MXS_SPI) += mxs_spi.o
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obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o
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obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
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obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
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obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o
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obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
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obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
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obj-$(CONFIG_SH_SPI) += sh_spi.o
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obj-$(CONFIG_SH_QSPI) += sh_qspi.o
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obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o
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obj-$(CONFIG_SUN4I_SPI) += sun4i_spi.o
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obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
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obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
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obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
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obj-$(CONFIG_TEGRA210_QSPI) += tegra210_qspi.o
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obj-$(CONFIG_TI_QSPI) += ti_qspi.o
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obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o
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obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
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obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o
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obj-$(CONFIG_ZYNQMP_GQSPI) += zynqmp_gqspi.o
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