1dd44e5a4a
Re-group the general options to note things that can be removed safely to reduce binary size when not required, and expand the comment about what commands we do include to note it could be replaced with a specific list of required one. While at it, move the CMD parts of various blocks IP to the end of the list for consistency. Signed-off-by: Tom Rini <trini@ti.com>
253 lines
8.0 KiB
C
253 lines
8.0 KiB
C
/*
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* ti_armv7_common.h
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* The various ARMv7 SoCs from TI all share a number of IP blocks when
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* implementing a given feature. Rather than define these in every
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* board or even SoC common file, we define a common file to be re-used
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* in all cases. While technically true that some of these details are
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* configurable at the board design, they are common throughout SoC
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* reference platforms as well as custom designs and become de facto
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* standards.
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*/
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#ifndef __CONFIG_TI_ARMV7_COMMON_H__
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#define __CONFIG_TI_ARMV7_COMMON_H__
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/* Common define for many platforms. */
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#define CONFIG_OMAP
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#define CONFIG_OMAP_COMMON
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/*
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* We typically do not contain NOR flash. In the cases where we do, we
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* undefine this later.
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*/
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#define CONFIG_SYS_NO_FLASH
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/* Support both device trees and ATAGs. */
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Our DDR memory always starts at 0x80000000 and U-Boot shall have
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* relocated itself to higher in memory by the time this value is used.
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x80000000
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/*
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* Default to a quick boot delay.
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*/
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#define CONFIG_BOOTDELAY 1
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/*
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* DDR information. We say (for simplicity) that we have 1 bank,
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* always, even when we have more. We always start at 0x80000000,
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* and we place the initial stack pointer in our SRAM.
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
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GENERATED_GBL_DATA_SIZE)
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/* Timer information. */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000 /* 1ms clock */
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/* I2C IP block */
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#define CONFIG_I2C
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_DRIVER_OMAP24XX_I2C
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#define CONFIG_CMD_I2C
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/* MMC/SD IP block */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_CMD_MMC
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/* McSPI IP block */
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#define CONFIG_SPI
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#define CONFIG_OMAP3_SPI
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#define CONFIG_CMD_SPI
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/* GPIO block */
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#define CONFIG_OMAP_GPIO
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#define CONFIG_CMD_GPIO
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/*
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* GPMC NAND block. We support 1 device and the physical address to
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* access CS0 at is 0x8000000.
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*/
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#ifdef CONFIG_NAND
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_SYS_NAND_BASE 0x8000000
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_CMD_NAND
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#endif
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/*
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* The following are general good-enough settings for U-Boot. We set a
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* large malloc pool as we generally have a lot of DDR, and we opt for
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* function over binary size in the main portion of U-Boot as this is
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* generally easily constrained later if needed. We enable the config
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* options that give us information in the environment about what board
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* we are on so we do not need to rely on the command prompt. We set a
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* console baudrate of 115200 and use the default baud rate table.
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*/
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#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT "U-Boot# "
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */
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#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
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/* As stated above, the following choices are optional. */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_VERSION_VARIABLE
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/* We set the max number of command args high to avoid HUSH bugs. */
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#define CONFIG_SYS_MAXARGS 64
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/* Console I/O Buffer Size */
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#define CONFIG_SYS_CBSIZE 512
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+ sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* When we have SPI, NOR or NAND flash we expect to be making use of
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* mtdparts, both for ease of use in U-Boot and for passing information
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* on to the Linux kernel.
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*/
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#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND)
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#define CONFIG_MTD_DEVICE /* Required for mtdparts */
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#define CONFIG_CMD_MTDPARTS
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#endif
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/*
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* For commands to use, we take the default list and add a few other
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* useful commands. Note that we must have set CONFIG_SYS_NO_FLASH
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* prior to this include, in order to skip a few commands. When we do
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* have flash, if we expect these commands they must be enabled in that
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* config. If desired, a specific list of desired commands can be used
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* instead.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_ECHO
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#define CONFIG_CMD_BOOTZ
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/*
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* Common filesystems support. When we have removable storage we
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* enabled a number of useful commands and support.
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*/
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#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_FS_GENERIC
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#endif
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/*
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* Our platforms make use of SPL to initalize the hardware (primarily
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* memory) enough for full U-Boot to be loaded. We also support Falcon
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* Mode so that the Linux kernel can be booted directly from SPL
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* instead, if desired. We make use of the general SPL framework found
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* under common/spl/. Given our generally common memory map, we set a
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* number of related defaults and sizes here.
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*/
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#ifndef CONFIG_NOR_BOOT
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_OS_BOOT
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/*
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* Place the image at the start of the ROM defined image space.
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* We limit our size to the ROM-defined downloaded image area, and use the
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* rest of the space for stack. We load U-Boot itself into memory at
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* 0x80800000 for legacy reasons (to not conflict with older SPLs). We
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* have our BSS be placed 1MiB after this, to allow for the default
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* Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
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* We have the SPL malloc pool at the end of the BSS area.
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*/
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SYS_TEXT_BASE 0x80800000
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#define CONFIG_SPL_BSS_START_ADDR 0x80a00000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
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#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
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CONFIG_SPL_BSS_MAX_SIZE)
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#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
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/* RAW SD card / eMMC locations. */
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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/* FAT sd card locations. */
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#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
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#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
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/* FAT */
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#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args"
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/* RAW SD card / eMMC */
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
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/* NAND */
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#ifdef CONFIG_NAND
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#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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/* spl export command */
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#define CONFIG_CMD_SPL
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#endif
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#ifdef CONFIG_MMC
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#endif
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/* General parts of the framework, required. */
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_BOARD_INIT
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#ifdef CONFIG_NAND
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#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#endif
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#endif /* !CONFIG_NOR_BOOT */
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#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */
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