cb91173a7f
We are about to reuse the rockchip timer (header file) for 64bit ARMv8 chips, so it seems a good time to make the register sizes explicit by changing from 'unsigned int' to 'u32'. Reorders the header-includes in rk_timer.c to ensure that 'u32' is definded before it is used by 'asm/arch/timer.h'. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
49 lines
1006 B
C
49 lines
1006 B
C
/*
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/timer.h>
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#include <asm/io.h>
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#include <linux/types.h>
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struct rk_timer * const timer_ptr = (void *)CONFIG_SYS_TIMER_BASE;
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static uint64_t rockchip_get_ticks(void)
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{
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uint64_t timebase_h, timebase_l;
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timebase_l = readl(&timer_ptr->timer_curr_value0);
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timebase_h = readl(&timer_ptr->timer_curr_value1);
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return timebase_h << 32 | timebase_l;
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}
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static uint64_t usec_to_tick(unsigned int usec)
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{
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uint64_t tick = usec;
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tick *= CONFIG_SYS_TIMER_RATE / (1000 * 1000);
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return tick;
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}
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void rockchip_udelay(unsigned int usec)
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{
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uint64_t tmp;
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/* get timestamp */
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tmp = rockchip_get_ticks() + usec_to_tick(usec);
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/* loop till event */
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while (rockchip_get_ticks() < tmp+1)
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;
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}
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void rockchip_timer_init(void)
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{
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writel(0xffffffff, &timer_ptr->timer_load_count0);
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writel(0xffffffff, &timer_ptr->timer_load_count1);
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writel(1, &timer_ptr->timer_ctrl_reg);
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}
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