6744c0d652
Add sound support for link, using the HDA codec implementation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
138 lines
3.3 KiB
C
138 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel HDA audio (Azalia) for ivybridge
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*
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* Originally from coreboot file bd82x6x/azalia.c
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2011 The ChromiumOS Authors.
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* Copyright 2018 Google LLC
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*/
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#define LOG_CATEGORY UCLASS_SOUND
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#include <common.h>
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#include <dm.h>
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#include <hda_codec.h>
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#include <pch.h>
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#include <sound.h>
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static int bd82x6x_azalia_probe(struct udevice *dev)
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{
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struct pci_child_platdata *plat;
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struct hda_codec_priv *priv;
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struct udevice *pch;
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u32 codec_mask;
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int conf;
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int ret;
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/* Only init after relocation */
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if (!(gd->flags & GD_FLG_RELOC))
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return 0;
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ret = hda_codec_init(dev);
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if (ret) {
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log_debug("Cannot set up HDA codec (err=%d)\n", ret);
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return ret;
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}
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priv = dev_get_priv(dev);
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ret = uclass_first_device_err(UCLASS_PCH, &pch);
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log_debug("PCH %p %s\n", pch, pch->name);
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if (ret)
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return ret;
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conf = pch_ioctl(pch, PCH_REQ_HDA_CONFIG, NULL, 0);
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log_debug("conf = %x\n", conf);
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if (conf >= 0) {
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dm_pci_clrset_config32(dev, 0x120, 7 << 24 | 0xfe,
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1 << 24 | /* 2 << 24 for server */
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conf);
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dm_pci_clrset_config16(dev, 0x78, 0, 1 << 1);
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} else {
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log_debug("V1CTL disabled\n");
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}
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dm_pci_clrset_config32(dev, 0x114, 0xfe, 0);
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/* Set VCi enable bit */
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dm_pci_clrset_config32(dev, 0x120, 0, 1U << 31);
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/* Enable HDMI codec */
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dm_pci_clrset_config32(dev, 0xc4, 0, 1 << 1);
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dm_pci_clrset_config8(dev, 0x43, 0, 1 << 6);
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/* Additional programming steps */
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dm_pci_clrset_config32(dev, 0xc4, 0, 1 << 13);
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dm_pci_clrset_config32(dev, 0xc4, 0, 1 << 10);
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dm_pci_clrset_config32(dev, 0xd0, 1U << 31, 0);
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/* Additional step on Panther Point */
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plat = dev_get_parent_platdata(dev);
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if (plat->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_HDA)
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dm_pci_clrset_config32(dev, 0xc4, 0, 1 << 17);
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dm_pci_write_config8(dev, 0x3c, 0xa); /* unused? */
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/* Audio Control: Select Azalia mode */
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dm_pci_clrset_config8(dev, 0x40, 0, 1);
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dm_pci_clrset_config8(dev, 0x4d, 1 << 7, 0); /* Docking not supported */
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codec_mask = hda_codec_detect(priv->regs);
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log_debug("codec_mask = %02x\n", codec_mask);
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if (codec_mask) {
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ret = hda_codecs_init(dev, priv->regs, codec_mask);
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if (ret) {
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log_err("Codec init failed (err=%d)\n", ret);
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return ret;
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}
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}
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/* Enable dynamic clock gating */
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dm_pci_clrset_config8(dev, 0x43, 7, BIT(2) | BIT(0));
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ret = hda_codec_finish_init(dev);
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if (ret) {
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log_debug("Cannot set up HDA codec (err=%d)\n", ret);
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return ret;
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}
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return 0;
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}
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static int bd82x6x_azalia_setup(struct udevice *dev)
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{
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return 0;
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}
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int bd82x6x_azalia_start_beep(struct udevice *dev, int frequency_hz)
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{
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return hda_codec_start_beep(dev, frequency_hz);
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}
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int bd82x6x_azalia_stop_beep(struct udevice *dev)
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{
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return hda_codec_stop_beep(dev);
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}
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static const struct sound_ops bd82x6x_azalia_ops = {
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.setup = bd82x6x_azalia_setup,
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.start_beep = bd82x6x_azalia_start_beep,
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.stop_beep = bd82x6x_azalia_stop_beep,
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};
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static const struct udevice_id bd82x6x_azalia_ids[] = {
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{ .compatible = "intel,hd-audio" },
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{ }
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};
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U_BOOT_DRIVER(bd82x6x_azalia_drv) = {
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.name = "bd82x6x-hda",
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.id = UCLASS_SOUND,
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.of_match = bd82x6x_azalia_ids,
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.probe = bd82x6x_azalia_probe,
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.ops = &bd82x6x_azalia_ops,
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.priv_auto_alloc_size = sizeof(struct hda_codec_priv),
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};
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