Pragnesh Patel 5ce50206ed riscv: sifive: fu540: enable all cache ways from U-Boot proper ... Add L2 cache node to enable all cache ways from U-Boot proper. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>		2020-07-03 15:09:06 +08:00
..
cpu	riscv: sifive: fu540: enable all cache ways from U-Boot proper	2020-07-03 15:09:06 +08:00
dts	riscv: sifive: fu540: enable all cache ways from U-Boot proper	2020-07-03 15:09:06 +08:00
include/asm	riscv: sifive: fu540: enable all cache ways from U-Boot proper	2020-07-03 15:09:06 +08:00
lib	riscv: Use optimized version of fdtdec_get_addr_size_no_parent	2020-07-03 15:09:00 +08:00
config.mk	kconfig / kbuild: Re-sync with Linux 4.19	2020-04-10 11:18:32 -04:00
Kconfig	riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE	2020-07-02 10:03:09 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00