44b7abf8dc
So far the Calxeda machines were using the CONFIG_SYS_TIMER_* macros to simply hardcode the address of the counter register of the SP804 timer. This method is deprecated and scheduled for removal. Use the newly introduced SP804 DM_TIMER driver to provide timer functionality on Highbank and Midway machines. The base address and base frequency are taken from the devicetree. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
29 lines
557 B
C
29 lines
557 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2010-2011 Calxeda, Inc.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
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#define CONFIG_PL011_CLOCK 150000000
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/*
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* Miscellaneous configurable options
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*/
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/* Environment data setup
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*/
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#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
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#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0x20000000\0" \
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"initrd_high=0x20000000\0"
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#endif
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