83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
60 lines
2.2 KiB
C
60 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Faraday USB 2.0 EHCI Controller
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*
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* (C) Copyright 2010 Faraday Technology
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* Dante Su <dantesu@faraday-tech.com>
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*/
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#ifndef _FUSBH200_H
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#define _FUSBH200_H
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struct fusbh200_regs {
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struct {
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uint32_t data[4];
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} hccr; /* 0x00 - 0x0f: hccr */
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struct {
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uint32_t data[9];
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} hcor; /* 0x10 - 0x33: hcor */
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uint32_t easstr;/* 0x34: EOF&Async. Sched. Sleep Timer Register */
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uint32_t rsvd[2];
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uint32_t bmcsr; /* 0x40: Bus Monitor Control Status Register */
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uint32_t bmisr; /* 0x44: Bus Monitor Interrupt Status Register */
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uint32_t bmier; /* 0x48: Bus Monitor Interrupt Enable Register */
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};
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/* EOF & Async. Schedule Sleep Timer Register */
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#define EASSTR_RUNNING (1 << 6) /* Put transceiver in running/resume mode */
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#define EASSTR_SUSPEND (0 << 6) /* Put transceiver in suspend mode */
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#define EASSTR_EOF2(x) (((x) & 0x3) << 4) /* EOF 2 Timing */
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#define EASSTR_EOF1(x) (((x) & 0x3) << 2) /* EOF 1 Timing */
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#define EASSTR_ASST(x) (((x) & 0x3) << 0) /* Async. Sched. Sleep Timer */
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/* Bus Monitor Control Status Register */
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#define BMCSR_SPD_HIGH (2 << 9) /* Speed of the attached device */
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#define BMCSR_SPD_LOW (1 << 9)
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#define BMCSR_SPD_FULL (0 << 9)
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#define BMCSR_SPD_MASK (3 << 9)
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#define BMCSR_SPD_SHIFT 9
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#define BMCSR_SPD(x) ((x >> 9) & 0x03)
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#define BMCSR_VBUS (1 << 8) /* VBUS Valid */
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#define BMCSR_VBUS_OFF (1 << 4) /* VBUS Off */
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#define BMCSR_VBUS_ON (0 << 4) /* VBUS On */
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#define BMCSR_IRQLH (1 << 3) /* IRQ triggered at level-high */
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#define BMCSR_IRQLL (0 << 3) /* IRQ triggered at level-low */
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#define BMCSR_HALFSPD (1 << 2) /* Half speed mode for FPGA test */
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#define BMCSR_HFT_LONG (1 << 1) /* HDISCON noise filter = 270 us*/
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#define BMCSR_HFT (0 << 1) /* HDISCON noise filter = 135 us*/
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#define BMCSR_VFT_LONG (1 << 1) /* VBUS noise filter = 472 us*/
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#define BMCSR_VFT (0 << 1) /* VBUS noise filter = 135 us*/
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/* Bus Monitor Interrupt Status Register */
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/* Bus Monitor Interrupt Enable Register */
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#define BMISR_DMAERR (1 << 4) /* DMA error */
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#define BMISR_DMA (1 << 3) /* DMA complete */
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#define BMISR_DEVRM (1 << 2) /* device removed */
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#define BMISR_OVD (1 << 1) /* over-current detected */
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#define BMISR_VBUSERR (1 << 0) /* VBUS error */
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#endif
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