36a01bdd80
Various clean-ups either in comments, order or spacing without any functional impact: - Add some comments in the device trees resp. reorder some parameters for consistency across all our modules. - Sort some include files alphabetically (while leaving common.h on top of course). - Streamline some comments in the configuration files and fix the spacing from using spaces to tabs. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
109 lines
2.1 KiB
Plaintext
109 lines
2.1 KiB
Plaintext
/dts-v1/;
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#include "tegra20.dtsi"
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/ {
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model = "Toradex Colibri T20";
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compatible = "toradex,colibri_t20", "nvidia,tegra20";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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i2c0 = "/i2c@7000d000";
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i2c1 = "/i2c@7000c000";
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i2c2 = "/i2c@7000c400";
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usb0 = "/usb@c5008000";
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usb1 = "/usb@c5000000";
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usb2 = "/usb@c5004000";
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sdhci0 = "/sdhci@c8000600";
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};
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host1x {
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status = "okay";
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dc@54200000 {
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status = "okay";
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rgb {
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status = "okay";
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nvidia,panel = <&lcd_panel>;
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};
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};
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};
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usb@c5000000 {
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dr_mode = "otg";
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};
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usb@c5004000 {
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/* VBUS_LAN */
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nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
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nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
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};
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usb@c5008000 {
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/* USBH_PEN */
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nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
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};
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nand-controller@70008000 {
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nvidia,wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
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nvidia,width = <8>;
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nvidia,timing = <15 100 25 80 25 10 15 10 100>;
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nand@0 {
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reg = <0>;
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compatible = "nand-flash";
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};
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};
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/*
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* GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
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* board)
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*/
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i2c@7000c000 {
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status = "okay";
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clock-frequency = <100000>;
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};
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/* GEN2_I2C: unused */
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/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
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i2c@7000c400 {
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status = "okay";
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clock-frequency = <100000>;
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};
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/*
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* PWR_I2C: power I2C to PMIC and temperature sensor
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*/
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <100000>;
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};
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sdhci@c8000600 {
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status = "okay";
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bus-width = <4>;
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cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
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};
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lcd_panel: panel {
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clock = <25175000>;
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xres = <640>;
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yres = <480>;
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left-margin = <48>; /* horizontal back porch */
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right-margin = <16>; /* horizontal front porch */
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hsync-len = <96>;
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lower-margin = <11>; /* vertical front porch */
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upper-margin = <31>; /* vertical back porch */
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vsync-len = <2>;
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hsync-active-high;
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vsync-active-high;
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nvidia,bits-per-pixel = <16>;
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nvidia,pwm = <&pwm 0 0>;
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nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
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nvidia,panel-timings = <0 0 0 0>;
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};
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};
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