f99a169c19
- Currently, CONFIG_RESET_PHY_R symbol is used in arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood boards with mv8831116 PHY, with each board defines the function reset_phy(). Undefine it for this board. - Add board_eth_init(), CONFIG_DM_ETH, and CONFIG_PHY_MARVELL to bring up Ethernet. - Miscellaneous changes: Move constants to .c file and remove header file board/iomega/iconnect/iconnect.h. Add CONFIG_HUSH_PARSER, use BIT macro, and cleanup comments. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
113 lines
2.4 KiB
C
113 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com>
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* Copyright (C) 2009-2012
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* Wojciech Dubowik <wojciech.dubowik@neratec.com>
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* Luka Perkov <luka@openwrt.org>
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*/
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#include <common.h>
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#include <init.h>
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#include <netdev.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/arch/mpp.h>
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#include <asm/global_data.h>
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#include <linux/bitops.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define ICONNECT_OE_LOW (~BIT(7))
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#define ICONNECT_OE_HIGH (~BIT(10))
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#define ICONNECT_OE_VAL_LOW (0)
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#define ICONNECT_OE_VAL_HIGH BIT(10)
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int board_early_init_f(void)
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{
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/*
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* default gpio configuration
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* There are maximum 64 gpios controlled through 2 sets of registers
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* the below configuration configures mainly initial LED status
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*/
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mvebu_config_gpio(ICONNECT_OE_VAL_LOW,
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ICONNECT_OE_VAL_HIGH,
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ICONNECT_OE_LOW, ICONNECT_OE_HIGH);
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/* Multi-Purpose Pins Functionality configuration */
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static const u32 kwmpp_config[] = {
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MPP0_NF_IO2,
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MPP1_NF_IO3,
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MPP2_NF_IO4,
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MPP3_NF_IO5,
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MPP4_NF_IO6,
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MPP5_NF_IO7,
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MPP6_SYSRST_OUTn, /* Reset signal */
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MPP7_GPO,
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MPP8_TW_SDA, /* I2C */
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MPP9_TW_SCK, /* I2C */
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MPP10_UART0_TXD,
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MPP11_UART0_RXD,
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MPP12_GPO, /* Reset button */
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MPP13_SD_CMD,
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MPP14_SD_D0,
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MPP15_SD_D1,
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MPP16_SD_D2,
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MPP17_SD_D3,
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MPP18_NF_IO0,
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MPP19_NF_IO1,
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MPP20_GE1_0,
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MPP21_GE1_1,
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MPP22_GE1_2,
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MPP23_GE1_3,
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MPP24_GE1_4,
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MPP25_GE1_5,
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MPP26_GE1_6,
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MPP27_GE1_7,
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MPP28_GPIO,
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MPP29_GPIO,
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MPP30_GE1_10,
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MPP31_GE1_11,
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MPP32_GE1_12,
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MPP33_GE1_13,
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MPP34_GE1_14,
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MPP35_GPIO, /* OTB button */
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MPP36_AUDIO_SPDIFI,
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MPP37_AUDIO_SPDIFO,
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MPP38_GPIO,
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MPP39_TDM_SPI_CS0,
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MPP40_TDM_SPI_SCK,
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MPP41_GPIO, /* LED brightness */
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MPP42_GPIO, /* LED power (blue) */
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MPP43_GPIO, /* LED power (red) */
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MPP44_GPIO, /* LED USB 1 */
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MPP45_GPIO, /* LED USB 2 */
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MPP46_GPIO, /* LED USB 3 */
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MPP47_GPIO, /* LED USB 4 */
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MPP48_GPIO, /* LED OTB */
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MPP49_GPIO,
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0
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};
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kirkwood_mpp_conf(kwmpp_config, NULL);
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return 0;
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}
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int board_eth_init(struct bd_info *bis)
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{
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return cpu_eth_init(bis);
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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return 0;
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}
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int board_late_init(void)
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{
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/* Do late init to ensure successful enumeration of PCIe devices */
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pci_init();
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return 0;
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}
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