9319a756ff
AT91 PIO controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic. Each SoC will have to describe the its limitation and pin configuration via device tree. This will allow to do not need to touch the C code when adding new SoC if the IP version is supported. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
23 lines
723 B
Makefile
23 lines
723 B
Makefile
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
obj-y += pinctrl-uclass.o
|
|
obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
|
|
|
|
obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
|
|
obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
|
|
obj-y += nxp/
|
|
obj-$(CONFIG_ARCH_ATH79) += ath79/
|
|
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
|
|
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
|
|
|
|
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
|
|
obj-$(CONFIG_PIC32_PINCTRL) += pinctrl_pic32.o
|
|
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
|
|
obj-$(CONFIG_PINCTRL_MESON) += meson/
|
|
obj-$(CONFIG_PINCTRL_MVEBU) += mvebu/
|
|
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
|
|
obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o
|
|
obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o
|