Andy Shevchenko 46db4bbac3 x86: tangier: Fix DMA controller IRQ polarity in CSRT ... IRQ polarity in CSRT has the same definition as by ACPI specification chapter 19.6.64 "Interrupt (Interrupt Resource Descriptor Macro)", i.e. ActiveHigh is 0, and ActiveLow is 1. On Intel Tangier the DMA controller IRQ polarity is ActiveHigh. Note, in DSDT (see southcluster.asl) it's described correctly. Fixes: 5e99fde34a ("x86: tangier: Populate CSRT for shared DMA controller") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>		2021-08-02 15:11:40 +08:00
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cpu	x86: tangier: Fix DMA controller IRQ polarity in CSRT	2021-08-02 15:11:40 +08:00
dts	x86: dts: Add "m25p,fast-read" to SPI flash node	2021-08-02 15:11:40 +08:00
include/asm	x86: Add function comments to cb_sysinfo.h	2021-07-15 19:50:17 +08:00
lib	smbios: error handling for invalid addresses	2021-07-24 10:49:51 +02:00
config.mk	Add support for stack-protector	2021-04-20 07:31:12 -04:00
Kconfig	x86: Move coreboot sysinfo parsing into generic x86 code	2021-03-27 13:59:59 +13:00
Makefile	x86: Allow 16-bit init to be in TPL	2019-05-08 13:02:13 +08:00