c69cda25c9
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
82 lines
1.9 KiB
C
82 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2017 Intel Corporation
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/device.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <sdhci.h>
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#define SDHCI_TANGIER_FMAX 200000000
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#define SDHCI_TANGIER_FMIN 400000
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struct sdhci_tangier_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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void __iomem *ioaddr;
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};
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static int sdhci_tangier_bind(struct udevice *dev)
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{
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struct sdhci_tangier_plat *plat = dev_get_plat(dev);
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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static int sdhci_tangier_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct sdhci_tangier_plat *plat = dev_get_plat(dev);
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struct sdhci_host *host = dev_get_priv(dev);
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fdt_addr_t base;
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int ret;
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base = dev_read_addr(dev);
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if (base == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->ioaddr = devm_ioremap(dev, base, SZ_1K);
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if (!plat->ioaddr)
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return -ENOMEM;
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host->name = dev->name;
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host->ioaddr = plat->ioaddr;
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host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
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SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD;
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/* MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195 */
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host->voltages = MMC_VDD_165_195;
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host->mmc = &plat->mmc;
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host->mmc->dev = dev;
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ret = sdhci_setup_cfg(&plat->cfg, host, SDHCI_TANGIER_FMAX,
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SDHCI_TANGIER_FMIN);
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if (ret)
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return ret;
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upriv->mmc = &plat->mmc;
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host->mmc->priv = host;
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return sdhci_probe(dev);
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}
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static const struct udevice_id sdhci_tangier_match[] = {
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{ .compatible = "intel,sdhci-tangier" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(sdhci_tangier) = {
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.name = "sdhci-tangier",
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.id = UCLASS_MMC,
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.of_match = sdhci_tangier_match,
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.bind = sdhci_tangier_bind,
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.probe = sdhci_tangier_probe,
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.ops = &sdhci_ops,
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.priv_auto = sizeof(struct sdhci_host),
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.plat_auto = sizeof(struct sdhci_tangier_plat),
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};
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