2fe88d4522
This converts the following to Kconfig: CONFIG_FLASH_CFI_DRIVER CONFIG_SYS_FLASH_USE_BUFFER_WRITE CONFIG_FLASH_CFI_MTD CONFIG_SYS_FLASH_PROTECTION CONFIG_SYS_FLASH_CFI Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Re-migrate] Signed-off-by: Tom Rini <trini@konsulko.com>
228 lines
6.3 KiB
C
228 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2012-2015 Panasonic Corporation
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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/* U-Boot - Common settings for UniPhier Family */
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#ifndef __CONFIG_UNIPHIER_COMMON_H__
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#define __CONFIG_UNIPHIER_COMMON_H__
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#ifndef CONFIG_SPL_BUILD
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#include <config_distro_bootcmd.h>
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#ifdef CONFIG_CMD_MMC
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#define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
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#else
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#define BOOT_TARGET_DEVICE_MMC(func)
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#endif
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#ifdef CONFIG_CMD_UBIFS
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#define BOOT_TARGET_DEVICE_UBIFS(func) func(UBIFS, ubifs, 0)
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#else
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#define BOOT_TARGET_DEVICE_UBIFS(func)
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#endif
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#ifdef CONFIG_CMD_USB
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#define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0)
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#else
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#define BOOT_TARGET_DEVICE_USB(func)
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#endif
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#define BOOT_TARGET_DEVICES(func) \
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BOOT_TARGET_DEVICE_MMC(func) \
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BOOT_TARGET_DEVICE_UBIFS(func) \
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BOOT_TARGET_DEVICE_USB(func)
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#else
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#define BOOTENV
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#endif
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#define CONFIG_ARMV7_PSCI_1_0
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/*-----------------------------------------------------------------------
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* MMU and Cache Setting
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*----------------------------------------------------------------------*/
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/* Comment out the following to enable L1 cache */
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/* #define CONFIG_SYS_ICACHE_OFF */
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/* #define CONFIG_SYS_DCACHE_OFF */
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#define CONFIG_TIMESTAMP
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/* FLASH related */
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_MONITOR_BASE 0
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#define CONFIG_SYS_MONITOR_LEN 0x000d0000 /* 832KB */
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#define CONFIG_SYS_FLASH_BASE 0
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/*
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* flash_toggle does not work for our support card.
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* We need to use flash_status_poll.
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*/
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#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
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#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
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#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
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/* serial console configuration */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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#define CONFIG_ENV_OFFSET 0x100000
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#define CONFIG_ENV_SIZE 0x2000
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/* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 1
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#if !defined(CONFIG_ARM64)
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/* Time clock 1MHz */
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#define CONFIG_SYS_TIMER_RATE 1000000
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#endif
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_REGS_BASE 0x68100000
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#define CONFIG_SYS_NAND_DATA_BASE 0x68000000
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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/* SD/MMC */
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#define CONFIG_SUPPORT_EMMC_BOOT
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
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/*
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* Network Configuration
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*/
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#define CONFIG_SERVERIP 192.168.11.1
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#define CONFIG_IPADDR 192.168.11.10
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#define CONFIG_GATEWAYIP 192.168.11.1
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_LOADADDR 0x85000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_BOOTM_LEN (32 << 20)
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#if defined(CONFIG_ARM64)
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/* ARM Trusted Firmware */
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#define BOOT_IMAGES \
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"second_image=unph_bl.bin\0" \
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"third_image=fip.bin\0"
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#else
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#define BOOT_IMAGES \
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"second_image=u-boot-spl.bin\0" \
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"third_image=u-boot.bin\0"
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#endif
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#define CONFIG_ROOTPATH "/nfs/root/path"
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#define CONFIG_NFSBOOTCOMMAND \
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"setenv bootargs $bootargs root=/dev/nfs rw " \
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"nfsroot=$serverip:$rootpath " \
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"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
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"run __nfsboot"
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#ifdef CONFIG_FIT
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#define CONFIG_BOOTFILE "fitImage"
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#define LINUXBOOT_ENV_SETTINGS \
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"kernel_addr_r=0x85100000\0" \
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"tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
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"bootm $kernel_addr_r\0" \
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"__nfsboot=run tftpboot\0"
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#else
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#ifdef CONFIG_ARM64
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#define CONFIG_BOOTFILE "Image"
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#define LINUXBOOT_CMD "booti"
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#define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0"
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#else
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#define CONFIG_BOOTFILE "zImage"
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#define LINUXBOOT_CMD "bootz"
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#define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0"
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#endif
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#define LINUXBOOT_ENV_SETTINGS \
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"fdt_addr_r=0x85100000\0" \
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KERNEL_ADDR_R \
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"ramdisk_addr_r=0x86000000\0" \
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"ramdisk_file=rootfs.cpio.gz\0" \
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"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
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LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
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"tftpboot=tftpboot $kernel_addr_r $bootfile && " \
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"tftpboot $fdt_addr_r $fdtfile &&" \
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"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
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"setenv ramdisk_addr_r $ramdisk_addr_r:$filesize &&" \
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"run boot_common\0" \
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"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
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"tftpboot $fdt_addr_r $fdtfile &&" \
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"setenv ramdisk_addr_r - &&" \
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"run boot_common\0"
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"scriptaddr=0x85000000\0" \
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"nor_base=0x42000000\0" \
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"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
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"tftpboot $tmp_addr $second_image && " \
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"setexpr tmp_addr $nor_base + 0x70000 && " \
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"tftpboot $tmp_addr $third_image\0" \
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"emmcupdate=mmcsetn &&" \
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"mmc dev $mmc_first_dev &&" \
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"mmc partconf $mmc_first_dev 0 1 1 &&" \
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"tftpboot $second_image && " \
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"mmc write $loadaddr 0 100 && " \
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"tftpboot $third_image && " \
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"mmc write $loadaddr 100 f00\0" \
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"nandupdate=nand erase 0 0x00100000 &&" \
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"tftpboot $second_image && " \
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"nand write $loadaddr 0 0x00020000 && " \
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"tftpboot $third_image && " \
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"nand write $loadaddr 0x00020000 0x001e0000\0" \
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"usbupdate=usb start &&" \
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"tftpboot $second_image && " \
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"usb write $loadaddr 0 100 && " \
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"tftpboot $third_image && " \
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"usb write $loadaddr 100 f00\0" \
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BOOT_IMAGES \
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LINUXBOOT_ENV_SETTINGS \
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BOOTENV
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#define CONFIG_SYS_BOOTMAPSZ 0x20000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
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/* only for SPL */
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#if defined(CONFIG_ARCH_UNIPHIER_LD4) || \
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defined(CONFIG_ARCH_UNIPHIER_SLD8)
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#define CONFIG_SPL_TEXT_BASE 0x00040000
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#else
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#define CONFIG_SPL_TEXT_BASE 0x00100000
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#endif
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#define CONFIG_SPL_STACK (0x00200000)
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
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/* subtract sizeof(struct image_header) */
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#define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40)
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#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
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#define CONFIG_SPL_MAX_FOOTPRINT 0x10000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
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#define CONFIG_SPL_PAD_TO 0x20000
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#endif /* __CONFIG_UNIPHIER_COMMON_H__ */
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