83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
148 lines
3.0 KiB
C
148 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (c) Copyright 2010-2017 Xilinx, Inc. All rights reserved.
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* (c) Copyright 2016 Topic Embedded Products.
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*/
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#include <asm/io.h>
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#include <asm/spl.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/ps7_init_gpl.h>
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__weak int ps7_init(void)
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{
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/*
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* This function is overridden by the one in
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* board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists.
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*/
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return 0;
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}
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__weak int ps7_post_config(void)
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{
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/*
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* This function is overridden by the one in
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* board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists.
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*/
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return 0;
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}
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/* For delay calculation using global registers*/
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#define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
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#define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
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#define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
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#define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
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#define APU_FREQ 666666666
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#define PS7_MASK_POLL_TIME 100000000
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/* IO accessors. No memory barriers desired. */
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static inline void iowrite(unsigned long val, unsigned long addr)
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{
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__raw_writel(val, addr);
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}
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static inline unsigned long ioread(unsigned long addr)
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{
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return __raw_readl(addr);
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}
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/* start timer */
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static void perf_start_clock(void)
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{
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iowrite((1 << 0) | /* Timer Enable */
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(1 << 3) | /* Auto-increment */
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(0 << 8), /* Pre-scale */
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SCU_GLOBAL_TIMER_CONTROL);
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}
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/* Compute mask for given delay in miliseconds*/
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static unsigned long get_number_of_cycles_for_delay(unsigned long delay)
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{
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return (APU_FREQ / (2 * 1000)) * delay;
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}
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/* stop timer */
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static void perf_disable_clock(void)
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{
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iowrite(0, SCU_GLOBAL_TIMER_CONTROL);
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}
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/* stop timer and reset timer count regs */
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static void perf_reset_clock(void)
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{
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perf_disable_clock();
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iowrite(0, SCU_GLOBAL_TIMER_COUNT_L32);
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iowrite(0, SCU_GLOBAL_TIMER_COUNT_U32);
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}
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static void perf_reset_and_start_timer(void)
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{
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perf_reset_clock();
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perf_start_clock();
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}
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int __weak ps7_config(unsigned long *ps7_config_init)
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{
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unsigned long *ptr = ps7_config_init;
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unsigned long opcode;
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unsigned long addr;
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unsigned long val;
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unsigned long mask;
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unsigned int numargs;
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int i;
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unsigned long delay;
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for (;;) {
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opcode = ptr[0];
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if (opcode == OPCODE_EXIT)
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return PS7_INIT_SUCCESS;
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addr = (opcode & OPCODE_ADDRESS_MASK);
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switch (opcode & ~OPCODE_ADDRESS_MASK) {
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case OPCODE_MASKWRITE:
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numargs = 3;
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mask = ptr[1];
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val = ptr[2];
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iowrite((ioread(addr) & ~mask) | (val & mask), addr);
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break;
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case OPCODE_WRITE:
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numargs = 2;
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val = ptr[1];
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iowrite(val, addr);
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break;
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case OPCODE_MASKPOLL:
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numargs = 2;
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mask = ptr[1];
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i = 0;
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while (!(ioread(addr) & mask)) {
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if (i == PS7_MASK_POLL_TIME)
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return PS7_INIT_TIMEOUT;
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i++;
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}
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break;
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case OPCODE_MASKDELAY:
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numargs = 2;
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mask = ptr[1];
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delay = get_number_of_cycles_for_delay(mask);
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perf_reset_and_start_timer();
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while (ioread(addr) < delay)
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;
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break;
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default:
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return PS7_INIT_CORRUPT;
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}
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ptr += numargs;
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}
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}
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unsigned long __weak __maybe_unused ps7GetSiliconVersion(void)
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{
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return zynq_get_silicon_version();
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}
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